cpu.cc (10417:710ee116eb68) cpu.cc (10464:2a0fe8bca031)
1/*
2 * Copyright (c) 2011-2012, 2014 ARM Limited
3 * Copyright (c) 2013 Advanced Micro Devices, Inc.
4 * All rights reserved
5 *
6 * The license below extends only to copyright in the software and shall
7 * not be construed as granting a license to any other intellectual
8 * property including but not limited to intellectual property relating

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400FullO3CPU<Impl>::~FullO3CPU()
401{
402}
403
404template <class Impl>
405void
406FullO3CPU<Impl>::regProbePoints()
407{
1/*
2 * Copyright (c) 2011-2012, 2014 ARM Limited
3 * Copyright (c) 2013 Advanced Micro Devices, Inc.
4 * All rights reserved
5 *
6 * The license below extends only to copyright in the software and shall
7 * not be construed as granting a license to any other intellectual
8 * property including but not limited to intellectual property relating

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400FullO3CPU<Impl>::~FullO3CPU()
401{
402}
403
404template <class Impl>
405void
406FullO3CPU<Impl>::regProbePoints()
407{
408 BaseCPU::regProbePoints();
409
408 ppInstAccessComplete = new ProbePointArg<PacketPtr>(getProbeManager(), "InstAccessComplete");
409 ppDataAccessComplete = new ProbePointArg<std::pair<DynInstPtr, PacketPtr> >(getProbeManager(), "DataAccessComplete");
410 ppInstAccessComplete = new ProbePointArg<PacketPtr>(getProbeManager(), "InstAccessComplete");
411 ppDataAccessComplete = new ProbePointArg<std::pair<DynInstPtr, PacketPtr> >(getProbeManager(), "DataAccessComplete");
412
410 fetch.regProbePoints();
411 iew.regProbePoints();
412 commit.regProbePoints();
413}
414
415template <class Impl>
416void
417FullO3CPU<Impl>::regStats()

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529void
530FullO3CPU<Impl>::tick()
531{
532 DPRINTF(O3CPU, "\n\nFullO3CPU: Ticking main, FullO3CPU.\n");
533 assert(!switchedOut());
534 assert(getDrainState() != Drainable::Drained);
535
536 ++numCycles;
413 fetch.regProbePoints();
414 iew.regProbePoints();
415 commit.regProbePoints();
416}
417
418template <class Impl>
419void
420FullO3CPU<Impl>::regStats()

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532void
533FullO3CPU<Impl>::tick()
534{
535 DPRINTF(O3CPU, "\n\nFullO3CPU: Ticking main, FullO3CPU.\n");
536 assert(!switchedOut());
537 assert(getDrainState() != Drainable::Drained);
538
539 ++numCycles;
540 ppCycles->notify(1);
537
538// activity = false;
539
540 //Tick each of the stages
541 fetch.tick();
542
543 decode.tick();
544

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1439 thread[tid]->numOp++;
1440 thread[tid]->numOps++;
1441 committedOps[tid]++;
1442
1443 system->totalNumInsts++;
1444 // Check for instruction-count-based events.
1445 comInstEventQueue[tid]->serviceEvents(thread[tid]->numInst);
1446 system->instEventQueue.serviceEvents(system->totalNumInsts);
541
542// activity = false;
543
544 //Tick each of the stages
545 fetch.tick();
546
547 decode.tick();
548

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1443 thread[tid]->numOp++;
1444 thread[tid]->numOps++;
1445 committedOps[tid]++;
1446
1447 system->totalNumInsts++;
1448 // Check for instruction-count-based events.
1449 comInstEventQueue[tid]->serviceEvents(thread[tid]->numInst);
1450 system->instEventQueue.serviceEvents(system->totalNumInsts);
1451
1452 probeInstCommit(inst->staticInst);
1447}
1448
1449template <class Impl>
1450void
1451FullO3CPU<Impl>::removeFrontInst(DynInstPtr &inst)
1452{
1453 DPRINTF(O3CPU, "Removing committed instruction [tid:%i] PC %s "
1454 "[sn:%lli]\n",

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1617 DPRINTF(Activity, "CPU already running.\n");
1618 return;
1619 }
1620
1621 DPRINTF(Activity, "Waking up CPU\n");
1622
1623 Cycles cycles(curCycle() - lastRunningCycle);
1624 // @todo: This is an oddity that is only here to match the stats
1453}
1454
1455template <class Impl>
1456void
1457FullO3CPU<Impl>::removeFrontInst(DynInstPtr &inst)
1458{
1459 DPRINTF(O3CPU, "Removing committed instruction [tid:%i] PC %s "
1460 "[sn:%lli]\n",

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1623 DPRINTF(Activity, "CPU already running.\n");
1624 return;
1625 }
1626
1627 DPRINTF(Activity, "Waking up CPU\n");
1628
1629 Cycles cycles(curCycle() - lastRunningCycle);
1630 // @todo: This is an oddity that is only here to match the stats
1625 if (cycles != 0)
1631 if (cycles > 1) {
1626 --cycles;
1632 --cycles;
1627 idleCycles += cycles;
1628 numCycles += cycles;
1633 idleCycles += cycles;
1634 numCycles += cycles;
1635 ppCycles->notify(cycles);
1636 }
1629
1630 schedule(tickEvent, clockEdge());
1631}
1632
1633template <class Impl>
1634void
1635FullO3CPU<Impl>::wakeup()
1636{

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1638 schedule(tickEvent, clockEdge());
1639}
1640
1641template <class Impl>
1642void
1643FullO3CPU<Impl>::wakeup()
1644{

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