1/* 2 * Copyright (c) 2011-2012, 2014, 2016, 2017 ARM Limited 3 * Copyright (c) 2013 Advanced Micro Devices, Inc. 4 * All rights reserved 5 * 6 * The license below extends only to copyright in the software and shall 7 * not be construed as granting a license to any other intellectual 8 * property including but not limited to intellectual property relating --- 1396 unchanged lines hidden (view full) --- 1405} 1406 1407template <class Impl> 1408auto 1409FullO3CPU<Impl>::readArchVecElem(const RegIndex& reg_idx, const ElemIndex& ldx, 1410 ThreadID tid) const -> const VecElem& 1411{ 1412 PhysRegIdPtr phys_reg = commitRenameMap[tid].lookup( |
1413 RegId(VecElemClass, reg_idx, ldx)); |
1414 return readVecElem(phys_reg); 1415} 1416 1417template <class Impl> 1418CCReg 1419FullO3CPU<Impl>::readArchCCReg(int reg_idx, ThreadID tid) 1420{ 1421 ccRegfileReads++; --- 364 unchanged lines hidden --- |