173,174c173
< params->numPhysCCRegs,
< params->numPhysVectorRegs),
---
> params->numPhysCCRegs),
273d271
< assert(params->numPhysVectorRegs >= numThreads * TheISA::NumVectorRegs);
318,323d315
<
< for (RegIndex ridx = 0; ridx < TheISA::NumVectorRegs; ++ridx) {
< PhysRegIndex phys_reg = freeList.getVectorReg();
< renameMap[tid].setVectorEntry(ridx, phys_reg);
< commitRenameMap[tid].setVectorEntry(ridx, phys_reg);
< }
532,541d523
< vectorRegfileReads
< .name(name() + ".vector_regfile_reads")
< .desc("number of vector regfile reads")
< .prereq(vectorRegfileReads);
<
< vectorRegfileWrites
< .name(name() + ".vector_regfile_writes")
< .desc("number of vector regfile writes")
< .prereq(vectorRegfileWrites);
<
828,839d809
< //Bind vector Regs to Rename Map
< max_reg = TheISA::NumIntRegs + TheISA::NumFloatRegs + TheISA::NumCCRegs +
< TheISA::NumVectorRegs;
< for (int vreg = TheISA::NumIntRegs + TheISA::NumFloatRegs +
< TheISA::NumCCRegs;
< vreg < max_reg; vreg++) {
< PhysRegIndex phys_reg = freeList.getVectorReg();
<
< renameMap[tid].setEntry(vreg, phys_reg);
< scoreboard.setReg(phys_reg);
< }
<
893,900d862
< // Unbind condition-code Regs from Rename Map
< max_reg = TheISA::Vector_Reg_Base + TheISA::NumVectorRegs;
< for (int vreg = TheISA::Vector_Reg_Base; vreg < max_reg; vreg++) {
< PhysRegIndex phys_reg = renameMap[tid].lookup(vreg);
< scoreboard.unsetReg(phys_reg);
< freeList.addReg(phys_reg);
< }
<
1300,1307d1261
< const VectorReg &
< FullO3CPU<Impl>::readVectorReg(int reg_idx)
< {
< vectorRegfileReads++;
< return regFile.readVectorReg(reg_idx);
< }
<
< template <class Impl>
1340,1347d1293
< void
< FullO3CPU<Impl>::setVectorReg(int reg_idx, const VectorReg &val)
< {
< vectorRegfileWrites++;
< regFile.setVectorReg(reg_idx, val);
< }
<
< template <class Impl>
1388,1397d1333
< const VectorReg&
< FullO3CPU<Impl>::readArchVectorReg(int reg_idx, ThreadID tid)
< {
< vectorRegfileReads++;
< PhysRegIndex phys_reg = commitRenameMap[tid].lookupVector(reg_idx);
<
< return regFile.readVectorReg(phys_reg);
< }
<
< template <class Impl>
1438,1447d1373
< void
< FullO3CPU<Impl>::setArchVectorReg(int reg_idx, const VectorReg &val,
< ThreadID tid)
< {
< vectorRegfileWrites++;
< PhysRegIndex phys_reg = commitRenameMap[tid].lookupVector(reg_idx);
< regFile.setVectorReg(phys_reg, val);
< }
<
< template <class Impl>