1/*
2 * Copyright (c) 2004-2006 The Regents of The University of Michigan
3 * Copyright (c) 2011 Regents of the University of California
4 * All rights reserved.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions are
8 * met: redistributions of source code must retain the above copyright

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35#include "config/the_isa.hh"
36#include "config/use_checker.hh"
37#include "cpu/o3/cpu.hh"
38#include "cpu/o3/isa_specific.hh"
39#include "cpu/o3/thread_context.hh"
40#include "cpu/activity.hh"
41#include "cpu/simple_thread.hh"
42#include "cpu/thread_context.hh"
43#include "debug/Activity.hh"
44#include "debug/O3CPU.hh"
45#include "debug/Quiesce.hh"
46#include "enums/MemoryMode.hh"
47#include "sim/core.hh"
48#include "sim/stat_control.hh"
49
50#if FULL_SYSTEM
51#include "cpu/quiesce_event.hh"
52#include "sim/system.hh"
53#else
54#include "sim/process.hh"
55#endif
56
57#if USE_CHECKER
58#include "cpu/checker/cpu.hh"
59#endif
60
61#if THE_ISA == ALPHA_ISA
62#include "arch/alpha/osfpal.hh"
63#include "debug/Activity.hh"
64#endif
65
66class BaseCPUParams;
67
68using namespace TheISA;
69using namespace std;
70
71BaseO3CPU::BaseO3CPU(BaseCPUParams *params)

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