1/*
2 * Copyright (c) 2004-2006 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;

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709
710 removeThread(tid);
711 }
712*/
713}
714
715template <class Impl>
716void
717FullO3CPU::switchOut()
718{
719 switchCount = 0;
720 fetch.switchOut();
721 decode.switchOut();
722 rename.switchOut();
723 iew.switchOut();
724 commit.switchOut();
725
726 // Wake the CPU and record activity so everything can drain out if

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739 commit.doSwitchOut();
740 instList.clear();
741 while (!removeList.empty()) {
742 removeList.pop();
743 }
744
745#if USE_CHECKER
746 if (checker)
747 checker->switchOut();
748#endif
749
750 if (tickEvent.scheduled())
751 tickEvent.squash();
752 _status = SwitchedOut;
753 }
754 assert(switchCount <= 5);
755}
756
757template <class Impl>
758void
759FullO3CPU<Impl>::takeOverFrom(BaseCPU *oldCPU)

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