commit_impl.hh (7720:65d338a8dba4) commit_impl.hh (7783:9b880b40ac10)
1/*
1/*
2 * Copyright (c) 2010 ARM Limited
3 * All rights reserved
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software
9 * licensed hereunder. You may use the software subject to the license
10 * terms below provided that you ensure that this notice is replicated
11 * unmodified and in its entirety in all distributions of the software,
12 * modified or unmodified, in source code or in binary form.
13 *
2 * Copyright (c) 2004-2006 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;
9 * redistributions in binary form must reproduce the above copyright

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895 ++commitCommittedInsts;
896
897 // To match the old model, don't count nops and instruction
898 // prefetches towards the total commit count.
899 if (!head_inst->isNop() && !head_inst->isInstPrefetch()) {
900 cpu->instDone(tid);
901 }
902
14 * Copyright (c) 2004-2006 The Regents of The University of Michigan
15 * All rights reserved.
16 *
17 * Redistribution and use in source and binary forms, with or without
18 * modification, are permitted provided that the following conditions are
19 * met: redistributions of source code must retain the above copyright
20 * notice, this list of conditions and the following disclaimer;
21 * redistributions in binary form must reproduce the above copyright

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907 ++commitCommittedInsts;
908
909 // To match the old model, don't count nops and instruction
910 // prefetches towards the total commit count.
911 if (!head_inst->isNop() && !head_inst->isInstPrefetch()) {
912 cpu->instDone(tid);
913 }
914
915 // Updates misc. registers.
916 head_inst->updateMiscRegs();
917
903 TheISA::advancePC(pc[tid], head_inst->staticInst);
904
905 int count = 0;
906 Addr oldpc;
907 // Debug statement. Checks to make sure we're not
908 // currently updating state while handling PC events.
909 assert(!thread[tid]->inSyscall && !thread[tid]->trapPending);
910 do {

--- 455 unchanged lines hidden --- 		918 TheISA::advancePC(pc[tid], head_inst->staticInst);
919
920 int count = 0;
921 Addr oldpc;
922 // Debug statement. Checks to make sure we're not
923 // currently updating state while handling PC events.
924 assert(!thread[tid]->inSyscall && !thread[tid]->trapPending);
925 do {

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