commit_impl.hh (3795:60ecc96c3cee) commit_impl.hh (3867:807483cfab77)
1/*
2 * Copyright (c) 2004-2006 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;

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382 rob->takeOverFrom();
383}
384
385template <class Impl>
386void
387DefaultCommit<Impl>::updateStatus()
388{
389 // reset ROB changed variable
1/*
2 * Copyright (c) 2004-2006 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;

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382 rob->takeOverFrom();
383}
384
385template <class Impl>
386void
387DefaultCommit<Impl>::updateStatus()
388{
389 // reset ROB changed variable
390 std::list<unsigned>::iterator threads = (*activeThreads).begin();
391 while (threads != (*activeThreads).end()) {
390 std::list<unsigned>::iterator threads = activeThreads->begin();
391 std::list<unsigned>::iterator end = activeThreads->end();
392
393 while (threads != end) {
392 unsigned tid = *threads++;
394 unsigned tid = *threads++;
395
393 changedROBNumEntries[tid] = false;
394
395 // Also check if any of the threads has a trap pending
396 if (commitStatus[tid] == TrapPending ||
397 commitStatus[tid] == FetchTrapPending) {
398 _nextStatus = Active;
399 }
400 }

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411}
412
413template <class Impl>
414void
415DefaultCommit<Impl>::setNextStatus()
416{
417 int squashes = 0;
418
396 changedROBNumEntries[tid] = false;
397
398 // Also check if any of the threads has a trap pending
399 if (commitStatus[tid] == TrapPending ||
400 commitStatus[tid] == FetchTrapPending) {
401 _nextStatus = Active;
402 }
403 }

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414}
415
416template <class Impl>
417void
418DefaultCommit<Impl>::setNextStatus()
419{
420 int squashes = 0;
421
419 std::list<unsigned>::iterator threads = (*activeThreads).begin();
422 std::list<unsigned>::iterator threads = activeThreads->begin();
423 std::list<unsigned>::iterator end = activeThreads->end();
420
424
421 while (threads != (*activeThreads).end()) {
425 while (threads != end) {
422 unsigned tid = *threads++;
423
424 if (commitStatus[tid] == ROBSquashing) {
425 squashes++;
426 }
427 }
428
429 squashCounter = squashes;

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434 _nextStatus = Active;
435 }
436}
437
438template <class Impl>
439bool
440DefaultCommit<Impl>::changedROBEntries()
441{
426 unsigned tid = *threads++;
427
428 if (commitStatus[tid] == ROBSquashing) {
429 squashes++;
430 }
431 }
432
433 squashCounter = squashes;

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438 _nextStatus = Active;
439 }
440}
441
442template <class Impl>
443bool
444DefaultCommit<Impl>::changedROBEntries()
445{
442 std::list<unsigned>::iterator threads = (*activeThreads).begin();
446 std::list<unsigned>::iterator threads = activeThreads->begin();
447 std::list<unsigned>::iterator end = activeThreads->end();
443
448
444 while (threads != (*activeThreads).end()) {
449 while (threads != end) {
445 unsigned tid = *threads++;
446
447 if (changedROBNumEntries[tid]) {
448 return true;
449 }
450 }
451
452 return false;

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509
510 // Send back the rob squashing signal so other stages know that
511 // the ROB is in the process of squashing.
512 toIEW->commitInfo[tid].robSquashing = true;
513
514 toIEW->commitInfo[tid].branchMispredict = false;
515
516 toIEW->commitInfo[tid].nextPC = PC[tid];
450 unsigned tid = *threads++;
451
452 if (changedROBNumEntries[tid]) {
453 return true;
454 }
455 }
456
457 return false;

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514
515 // Send back the rob squashing signal so other stages know that
516 // the ROB is in the process of squashing.
517 toIEW->commitInfo[tid].robSquashing = true;
518
519 toIEW->commitInfo[tid].branchMispredict = false;
520
521 toIEW->commitInfo[tid].nextPC = PC[tid];
517 toIEW->commitInfo[tid].nextNPC = nextPC[tid];
518}
519
520template <class Impl>
521void
522DefaultCommit<Impl>::squashFromTrap(unsigned tid)
523{
524 squashAll(tid);
525

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559 _nextStatus = Inactive;
560
561 if (drainPending && rob->isEmpty() && !iewStage->hasStoresToWB()) {
562 cpu->signalDrained();
563 drainPending = false;
564 return;
565 }
566
522}
523
524template <class Impl>
525void
526DefaultCommit<Impl>::squashFromTrap(unsigned tid)
527{
528 squashAll(tid);
529

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563 _nextStatus = Inactive;
564
565 if (drainPending && rob->isEmpty() && !iewStage->hasStoresToWB()) {
566 cpu->signalDrained();
567 drainPending = false;
568 return;
569 }
570
567 if ((*activeThreads).size() <= 0)
571 if (activeThreads->empty())
568 return;
569
572 return;
573
570 std::list<unsigned>::iterator threads = (*activeThreads).begin();
574 std::list<unsigned>::iterator threads = activeThreads->begin();
575 std::list<unsigned>::iterator end = activeThreads->end();
571
572 // Check if any of the threads are done squashing. Change the
573 // status if they are done.
576
577 // Check if any of the threads are done squashing. Change the
578 // status if they are done.
574 while (threads != (*activeThreads).end()) {
579 while (threads != end) {
575 unsigned tid = *threads++;
576
577 if (commitStatus[tid] == ROBSquashing) {
578
579 if (rob->isDoneSquashing(tid)) {
580 commitStatus[tid] = Running;
581 } else {
582 DPRINTF(Commit,"[tid:%u]: Still Squashing, cannot commit any"

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587 }
588 }
589 }
590
591 commit();
592
593 markCompletedInsts();
594
580 unsigned tid = *threads++;
581
582 if (commitStatus[tid] == ROBSquashing) {
583
584 if (rob->isDoneSquashing(tid)) {
585 commitStatus[tid] = Running;
586 } else {
587 DPRINTF(Commit,"[tid:%u]: Still Squashing, cannot commit any"

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592 }
593 }
594 }
595
596 commit();
597
598 markCompletedInsts();
599
595 threads = (*activeThreads).begin();
600 threads = activeThreads->begin();
596
601
597 while (threads != (*activeThreads).end()) {
602 while (threads != end) {
598 unsigned tid = *threads++;
599
600 if (!rob->isEmpty(tid) && rob->readHeadInst(tid)->readyToCommit()) {
601 // The ROB has more instructions it can commit. Its next status
602 // will be active.
603 _nextStatus = Active;
604
605 DynInstPtr inst = rob->readHeadInst(tid);

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687 }
688 }
689
690#endif // FULL_SYSTEM
691
692 ////////////////////////////////////
693 // Check for any possible squashes, handle them first
694 ////////////////////////////////////
603 unsigned tid = *threads++;
604
605 if (!rob->isEmpty(tid) && rob->readHeadInst(tid)->readyToCommit()) {
606 // The ROB has more instructions it can commit. Its next status
607 // will be active.
608 _nextStatus = Active;
609
610 DynInstPtr inst = rob->readHeadInst(tid);

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692 }
693 }
694
695#endif // FULL_SYSTEM
696
697 ////////////////////////////////////
698 // Check for any possible squashes, handle them first
699 ////////////////////////////////////
695 std::list<unsigned>::iterator threads = (*activeThreads).begin();
700 std::list<unsigned>::iterator threads = activeThreads->begin();
701 std::list<unsigned>::iterator end = activeThreads->end();
696
702
697 while (threads != (*activeThreads).end()) {
703 while (threads != end) {
698 unsigned tid = *threads++;
699
700 // Not sure which one takes priority. I think if we have
701 // both, that's a bad sign.
702 if (trapSquash[tid] == true) {
703 assert(!tcSquash[tid]);
704 squashFromTrap(tid);
705 } else if (tcSquash[tid] == true) {

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724
725 commitStatus[tid] = ROBSquashing;
726
727 // If we want to include the squashing instruction in the squash,
728 // then use one older sequence number.
729 InstSeqNum squashed_inst = fromIEW->squashedSeqNum[tid];
730
731#if ISA_HAS_DELAY_SLOT
704 unsigned tid = *threads++;
705
706 // Not sure which one takes priority. I think if we have
707 // both, that's a bad sign.
708 if (trapSquash[tid] == true) {
709 assert(!tcSquash[tid]);
710 squashFromTrap(tid);
711 } else if (tcSquash[tid] == true) {

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730
731 commitStatus[tid] = ROBSquashing;
732
733 // If we want to include the squashing instruction in the squash,
734 // then use one older sequence number.
735 InstSeqNum squashed_inst = fromIEW->squashedSeqNum[tid];
736
737#if ISA_HAS_DELAY_SLOT
732 InstSeqNum bdelay_done_seq_num = squashed_inst;
733 bool squash_bdelay_slot = fromIEW->squashDelaySlot[tid];
738 InstSeqNum bdelay_done_seq_num;
739 bool squash_bdelay_slot;
734
740
735 if (!squash_bdelay_slot)
736 bdelay_done_seq_num++;
741 if (fromIEW->branchMispredict[tid]) {
742 if (fromIEW->branchTaken[tid] &&
743 fromIEW->condDelaySlotBranch[tid]) {
744 DPRINTF(Commit, "[tid:%i]: Cond. delay slot branch"
745 "mispredicted as taken. Squashing after previous "
746 "inst, [sn:%i]\n",
747 tid, squashed_inst);
748 bdelay_done_seq_num = squashed_inst;
749 squash_bdelay_slot = true;
750 } else {
751 DPRINTF(Commit, "[tid:%i]: Branch Mispredict. Squashing "
752 "after delay slot [sn:%i]\n", tid, squashed_inst+1);
753 bdelay_done_seq_num = squashed_inst + 1;
754 squash_bdelay_slot = false;
755 }
756 } else {
757 bdelay_done_seq_num = squashed_inst;
758 squash_bdelay_slot = true;
759 }
737#endif
738
739 if (fromIEW->includeSquashInst[tid] == true) {
740 squashed_inst--;
741#if ISA_HAS_DELAY_SLOT
742 bdelay_done_seq_num--;
743#endif
744 }

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766
767 toIEW->commitInfo[tid].branchMispredict =
768 fromIEW->branchMispredict[tid];
769
770 toIEW->commitInfo[tid].branchTaken =
771 fromIEW->branchTaken[tid];
772
773 toIEW->commitInfo[tid].nextPC = fromIEW->nextPC[tid];
760#endif
761
762 if (fromIEW->includeSquashInst[tid] == true) {
763 squashed_inst--;
764#if ISA_HAS_DELAY_SLOT
765 bdelay_done_seq_num--;
766#endif
767 }

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789
790 toIEW->commitInfo[tid].branchMispredict =
791 fromIEW->branchMispredict[tid];
792
793 toIEW->commitInfo[tid].branchTaken =
794 fromIEW->branchTaken[tid];
795
796 toIEW->commitInfo[tid].nextPC = fromIEW->nextPC[tid];
774 toIEW->commitInfo[tid].nextNPC = fromIEW->nextNPC[tid];
775
776 toIEW->commitInfo[tid].mispredPC = fromIEW->mispredPC[tid];
777
778 if (toIEW->commitInfo[tid].branchMispredict) {
779 ++branchMispredicts;
780 }
781 }
782

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792 commitInsts();
793 } else {
794#if ISA_HAS_DELAY_SLOT
795 skidInsert();
796#endif
797 }
798
799 //Check for any activity
797
798 toIEW->commitInfo[tid].mispredPC = fromIEW->mispredPC[tid];
799
800 if (toIEW->commitInfo[tid].branchMispredict) {
801 ++branchMispredicts;
802 }
803 }
804

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814 commitInsts();
815 } else {
816#if ISA_HAS_DELAY_SLOT
817 skidInsert();
818#endif
819 }
820
821 //Check for any activity
800 threads = (*activeThreads).begin();
822 threads = activeThreads->begin();
801
823
802 while (threads != (*activeThreads).end()) {
824 while (threads != end) {
803 unsigned tid = *threads++;
804
805 if (changedROBNumEntries[tid]) {
806 toIEW->commitInfo[tid].usedROB = true;
807 toIEW->commitInfo[tid].freeROBEntries = rob->numFreeEntries(tid);
808
809 if (rob->isEmpty(tid)) {
810 toIEW->commitInfo[tid].emptyROB = true;

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1097 head_inst->traceData->setFetchSeq(head_inst->seqNum);
1098 head_inst->traceData->setCPSeq(thread[tid]->numInst);
1099 head_inst->traceData->finalize();
1100 head_inst->traceData = NULL;
1101 }
1102
1103 // Update the commit rename map
1104 for (int i = 0; i < head_inst->numDestRegs(); i++) {
825 unsigned tid = *threads++;
826
827 if (changedROBNumEntries[tid]) {
828 toIEW->commitInfo[tid].usedROB = true;
829 toIEW->commitInfo[tid].freeROBEntries = rob->numFreeEntries(tid);
830
831 if (rob->isEmpty(tid)) {
832 toIEW->commitInfo[tid].emptyROB = true;

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1119 head_inst->traceData->setFetchSeq(head_inst->seqNum);
1120 head_inst->traceData->setCPSeq(thread[tid]->numInst);
1121 head_inst->traceData->finalize();
1122 head_inst->traceData = NULL;
1123 }
1124
1125 // Update the commit rename map
1126 for (int i = 0; i < head_inst->numDestRegs(); i++) {
1105 renameMap[tid]->setEntry(head_inst->flattenedDestRegIdx(i),
1127 renameMap[tid]->setEntry(head_inst->destRegIdx(i),
1106 head_inst->renamedDestRegIdx(i));
1107 }
1108
1109 if (head_inst->isCopy())
1110 panic("Should not commit any copy instructions!");
1111
1112 // Finally clear the head ROB entry.
1113 rob->retireHead(tid);

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1244 }
1245 }
1246}
1247
1248template <class Impl>
1249bool
1250DefaultCommit<Impl>::robDoneSquashing()
1251{
1128 head_inst->renamedDestRegIdx(i));
1129 }
1130
1131 if (head_inst->isCopy())
1132 panic("Should not commit any copy instructions!");
1133
1134 // Finally clear the head ROB entry.
1135 rob->retireHead(tid);

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1266 }
1267 }
1268}
1269
1270template <class Impl>
1271bool
1272DefaultCommit<Impl>::robDoneSquashing()
1273{
1252 std::list<unsigned>::iterator threads = (*activeThreads).begin();
1274 std::list<unsigned>::iterator threads = activeThreads->begin();
1275 std::list<unsigned>::iterator end = activeThreads->end();
1253
1276
1254 while (threads != (*activeThreads).end()) {
1277 while (threads != end) {
1255 unsigned tid = *threads++;
1256
1257 if (!rob->isDoneSquashing(tid))
1258 return false;
1259 }
1260
1261 return true;
1262}

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1325
1326 case OldestReady:
1327 return oldestReady();
1328
1329 default:
1330 return -1;
1331 }
1332 } else {
1278 unsigned tid = *threads++;
1279
1280 if (!rob->isDoneSquashing(tid))
1281 return false;
1282 }
1283
1284 return true;
1285}

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1348
1349 case OldestReady:
1350 return oldestReady();
1351
1352 default:
1353 return -1;
1354 }
1355 } else {
1333 int tid = (*activeThreads).front();
1356 assert(!activeThreads->empty());
1357 int tid = activeThreads->front();
1334
1335 if (commitStatus[tid] == Running ||
1336 commitStatus[tid] == Idle ||
1337 commitStatus[tid] == FetchTrapPending) {
1338 return tid;
1339 } else {
1340 return -1;
1341 }

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1372
1373template<class Impl>
1374int
1375DefaultCommit<Impl>::oldestReady()
1376{
1377 unsigned oldest = 0;
1378 bool first = true;
1379
1358
1359 if (commitStatus[tid] == Running ||
1360 commitStatus[tid] == Idle ||
1361 commitStatus[tid] == FetchTrapPending) {
1362 return tid;
1363 } else {
1364 return -1;
1365 }

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1396
1397template<class Impl>
1398int
1399DefaultCommit<Impl>::oldestReady()
1400{
1401 unsigned oldest = 0;
1402 bool first = true;
1403
1380 std::list<unsigned>::iterator threads = (*activeThreads).begin();
1404 std::list<unsigned>::iterator threads = activeThreads->begin();
1405 std::list<unsigned>::iterator end = activeThreads->end();
1381
1406
1382 while (threads != (*activeThreads).end()) {
1407 while (threads != end) {
1383 unsigned tid = *threads++;
1384
1385 if (!rob->isEmpty(tid) &&
1386 (commitStatus[tid] == Running ||
1387 commitStatus[tid] == Idle ||
1388 commitStatus[tid] == FetchTrapPending)) {
1389
1390 if (rob->isHeadReady(tid)) {

--- 19 unchanged lines hidden --- 		1408 unsigned tid = *threads++;
1409
1410 if (!rob->isEmpty(tid) &&
1411 (commitStatus[tid] == Running ||
1412 commitStatus[tid] == Idle ||
1413 commitStatus[tid] == FetchTrapPending)) {
1414
1415 if (rob->isHeadReady(tid)) {

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