commit_impl.hh (3577:605c370622b1) commit_impl.hh (3633:524f2aadbc89)
1/*
2 * Copyright (c) 2004-2006 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;

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635 //////////////////////////////////////
636
637#if FULL_SYSTEM
638 // Process interrupts if interrupts are enabled, not in PAL mode,
639 // and no other traps or external squashes are currently pending.
640 // @todo: Allow other threads to handle interrupts.
641 if (cpu->checkInterrupts &&
642 cpu->check_interrupts(cpu->tcBase(0)) &&
1/*
2 * Copyright (c) 2004-2006 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;

--- 626 unchanged lines hidden (view full) ---

635 //////////////////////////////////////
636
637#if FULL_SYSTEM
638 // Process interrupts if interrupts are enabled, not in PAL mode,
639 // and no other traps or external squashes are currently pending.
640 // @todo: Allow other threads to handle interrupts.
641 if (cpu->checkInterrupts &&
642 cpu->check_interrupts(cpu->tcBase(0)) &&
643 commitStatus[0] != TrapPending &&
643 !trapSquash[0] &&
644 !tcSquash[0]) {
644 !trapSquash[0] &&
645 !tcSquash[0]) {
646
647 // Get any interrupt that happened
648 Fault intr = cpu->getInterrupts();
649
650 // Exit this if block if there's no fault.
651 if (intr == NoFault) {
652 goto commit_insts;
653 }
654
645 // Tell fetch that there is an interrupt pending. This will
646 // make fetch wait until it sees a non PAL-mode PC, at which
647 // point it stops fetching instructions.
648 toIEW->commitInfo[0].interruptPending = true;
649
650 // Wait until the ROB is empty and all stores have drained in
651 // order to enter the interrupt.
652 if (rob->isEmpty() && !iewStage->hasStoresToWB()) {
655 // Tell fetch that there is an interrupt pending. This will
656 // make fetch wait until it sees a non PAL-mode PC, at which
657 // point it stops fetching instructions.
658 toIEW->commitInfo[0].interruptPending = true;
659
660 // Wait until the ROB is empty and all stores have drained in
661 // order to enter the interrupt.
662 if (rob->isEmpty() && !iewStage->hasStoresToWB()) {
653 // Not sure which thread should be the one to interrupt. For now
654 // always do thread 0.
663 // Squash or record that I need to squash this cycle if
664 // an interrupt needed to be handled.
665 DPRINTF(Commit, "Interrupt detected.\n");
666
655 assert(!thread[0]->inSyscall);
656 thread[0]->inSyscall = true;
657
667 assert(!thread[0]->inSyscall);
668 thread[0]->inSyscall = true;
669
658 // CPU will handle implementation of the interrupt.
659 cpu->processInterrupts();
670 // CPU will handle interrupt.
671 cpu->processInterrupts(intr);
660
672
661 // Now squash or record that I need to squash this cycle.
662 commitStatus[0] = TrapPending;
663
664 // Exit state update mode to avoid accidental updating.
665 thread[0]->inSyscall = false;
666
673 thread[0]->inSyscall = false;
674
675 commitStatus[0] = TrapPending;
676
667 // Generate trap squash event.
668 generateTrapEvent(0);
669
670 toIEW->commitInfo[0].clearInterrupt = true;
677 // Generate trap squash event.
678 generateTrapEvent(0);
679
680 toIEW->commitInfo[0].clearInterrupt = true;
671
672 DPRINTF(Commit, "Interrupt detected.\n");
673 } else {
674 DPRINTF(Commit, "Interrupt pending, waiting for ROB to empty.\n");
675 }
676 }
677#endif // FULL_SYSTEM
678
679 ////////////////////////////////////
680 // Check for any possible squashes, handle them first
681 ////////////////////////////////////
681 } else {
682 DPRINTF(Commit, "Interrupt pending, waiting for ROB to empty.\n");
683 }
684 }
685#endif // FULL_SYSTEM
686
687 ////////////////////////////////////
688 // Check for any possible squashes, handle them first
689 ////////////////////////////////////
682
690 commit_insts:
683 std::list<unsigned>::iterator threads = (*activeThreads).begin();
684
685 while (threads != (*activeThreads).end()) {
686 unsigned tid = *threads++;
687
688 // Not sure which one takes priority. I think if we have
689 // both, that's a bad sign.
690 if (trapSquash[tid] == true) {

--- 722 unchanged lines hidden --- 		691 std::list<unsigned>::iterator threads = (*activeThreads).begin();
692
693 while (threads != (*activeThreads).end()) {
694 unsigned tid = *threads++;
695
696 // Not sure which one takes priority. I think if we have
697 // both, that's a bad sign.
698 if (trapSquash[tid] == true) {

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