1/* 2 * Copyright (c) 2010 ARM Limited 3 * All rights reserved 4 * 5 * The license below extends only to copyright in the software and shall 6 * not be construed as granting a license to any other intellectual 7 * property including but not limited to intellectual property relating 8 * to a hardware implementation of the functionality of the software --- 1128 unchanged lines hidden (view full) --- 1137 // that the trap need. 1138 cpu->trap(inst_fault, tid, head_inst->staticInst); 1139 1140 // Exit state update mode to avoid accidental updating. 1141 thread[tid]->inSyscall = false; 1142 1143 commitStatus[tid] = TrapPending; 1144 |
1145 DPRINTF(Commit, "Committing instruction with fault [sn:%lli]\n", 1146 head_inst->seqNum); |
1147 if (head_inst->traceData) { 1148 if (DTRACE(ExecFaulting)) { 1149 head_inst->traceData->setFetchSeq(head_inst->seqNum); 1150 head_inst->traceData->setCPSeq(thread[tid]->numInst); 1151 head_inst->traceData->dump(); 1152 } 1153 delete head_inst->traceData; 1154 head_inst->traceData = NULL; --- 314 unchanged lines hidden --- |