1/* 2 * Copyright (c) 2004-2006 The Regents of The University of Michigan 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions are 7 * met: redistributions of source code must retain the above copyright 8 * notice, this list of conditions and the following disclaimer; --- 1166 unchanged lines hidden (view full) --- 1175#if ISA_HAS_DELAY_SLOT 1176 if (rename_idx < fromRename->size) { 1177 DPRINTF(Commit,"Placing Rename Insts into skidBuffer.\n"); 1178 1179 for (; 1180 rename_idx < fromRename->size; 1181 rename_idx++) { 1182 DynInstPtr inst = fromRename->insts[rename_idx]; |
1183 1184 if (!inst->isSquashed()) { 1185 DPRINTF(Commit, "Inserting PC %#x [sn:%i] [tid:%i] into ", |
1186 "skidBuffer.\n", inst->readPC(), inst->seqNum, 1187 inst->threadNumber); |
1188 skidBuffer.push(inst); 1189 } else { 1190 DPRINTF(Commit, "Instruction PC %#x [sn:%i] [tid:%i] was " 1191 "squashed, skipping.\n", |
1192 inst->readPC(), inst->seqNum, inst->threadNumber); |
1193 } 1194 } 1195 } 1196#endif 1197 1198} 1199 1200template <class Impl> --- 207 unchanged lines hidden --- |