1/* 2 * Copyright (c) 2004-2006 The Regents of The University of Michigan 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions are 7 * met: redistributions of source code must retain the above copyright 8 * notice, this list of conditions and the following disclaimer; --- 1183 unchanged lines hidden (view full) --- 1192#if ISA_HAS_DELAY_SLOT 1193 if (rename_idx < fromRename->size) { 1194 DPRINTF(Commit,"Placing Rename Insts into skidBuffer.\n"); 1195 1196 for (; 1197 rename_idx < fromRename->size; 1198 rename_idx++) { 1199 DynInstPtr inst = fromRename->insts[rename_idx]; |
1200 1201 if (!inst->isSquashed()) { 1202 DPRINTF(Commit, "Inserting PC %#x [sn:%i] [tid:%i] into ", |
1203 "skidBuffer.\n", inst->readPC(), inst->seqNum, 1204 inst->threadNumber); |
1205 skidBuffer.push(inst); 1206 } else { 1207 DPRINTF(Commit, "Instruction PC %#x [sn:%i] [tid:%i] was " 1208 "squashed, skipping.\n", |
1209 inst->readPC(), inst->seqNum, inst->threadNumber); |
1210 } 1211 } 1212 } 1213#endif 1214 1215} 1216 1217template <class Impl> --- 207 unchanged lines hidden --- |