1/*
2 * Copyright (c) 2004-2006 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;
9 * redistributions in binary form must reproduce the above copyright

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895 ++commitCommittedInsts;
896
897 // To match the old model, don't count nops and instruction
898 // prefetches towards the total commit count.
899 if (!head_inst->isNop() && !head_inst->isInstPrefetch()) {
900 cpu->instDone(tid);
901 }
902
903 TheISA::advancePC(pc[tid], head_inst->staticInst);
904
905 int count = 0;
906 Addr oldpc;
907 // Debug statement. Checks to make sure we're not
908 // currently updating state while handling PC events.
909 assert(!thread[tid]->inSyscall && !thread[tid]->trapPending);
910 do {

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