1/*
2 * Copyright 2014 Google, Inc.
3 * Copyright (c) 2010-2014 ARM Limited
4 * All rights reserved
5 *
6 * The license below extends only to copyright in the software and shall
7 * not be construed as granting a license to any other intellectual
8 * property including but not limited to intellectual property relating

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66#include "debug/O3PipeView.hh"
67#include "params/DerivO3CPU.hh"
68#include "sim/faults.hh"
69#include "sim/full_system.hh"
70
71using namespace std;
72
73template <class Impl>
74DefaultCommit<Impl>::TrapEvent::TrapEvent(DefaultCommit<Impl> *_commit,
75 ThreadID _tid)
76 : Event(CPU_Tick_Pri, AutoDelete), commit(_commit), tid(_tid)
77{
78}
79
80template <class Impl>
81void
82DefaultCommit<Impl>::TrapEvent::process()
83{
84 // This will get reset by commit if it was switched out at the
85 // time of this event processing.
86 commit->trapSquash[tid] = true;
87}
88
89template <class Impl>
90const char *
91DefaultCommit<Impl>::TrapEvent::description() const
92{
93 return "Trap";
94}
95
96template <class Impl>
97DefaultCommit<Impl>::DefaultCommit(O3CPU *_cpu, DerivO3CPUParams *params)
98 : cpu(_cpu),
99 iewToCommitDelay(params->iewToCommitDelay),
100 commitToIEWDelay(params->commitToIEWDelay),
101 renameToROBDelay(params->renameToROBDelay),
102 fetchToCommitDelay(params->commitToFetchDelay),
103 renameWidth(params->renameWidth),
104 commitWidth(params->commitWidth),

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532}
533
534template <class Impl>
535void
536DefaultCommit<Impl>::generateTrapEvent(ThreadID tid, Fault inst_fault)
537{
538 DPRINTF(Commit, "Generating trap event for [tid:%i]\n", tid);
539
540 TrapEvent *trap = new TrapEvent(this, tid);
541
542 Cycles latency = dynamic_pointer_cast<SyscallRetryFault>(inst_fault) ?
543 cpu->syscallRetryLatency : trapLatency;
544
545 cpu->schedule(trap, cpu->clockEdge(latency));
546 trapInFlight[tid] = true;
547 thread[tid]->trapPending = true;
548}

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