1/*
2 * Copyright 2014 Google, Inc.
3 * Copyright (c) 2010-2014 ARM Limited
4 * All rights reserved
5 *
6 * The license below extends only to copyright in the software and shall
7 * not be construed as granting a license to any other intellectual
8 * property including but not limited to intellectual property relating

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66#include "debug/O3PipeView.hh"
67#include "params/DerivO3CPU.hh"
68#include "sim/faults.hh"
69#include "sim/full_system.hh"
70
71using namespace std;
72
73template <class Impl>
74void
75DefaultCommit<Impl>::processTrapEvent(ThreadID tid)
76{
77 // This will get reset by commit if it was switched out at the
78 // time of this event processing.
79 trapSquash[tid] = true;
80}
81
82template <class Impl>
83DefaultCommit<Impl>::DefaultCommit(O3CPU *_cpu, DerivO3CPUParams *params)
84 : cpu(_cpu),
85 iewToCommitDelay(params->iewToCommitDelay),
86 commitToIEWDelay(params->commitToIEWDelay),
87 renameToROBDelay(params->renameToROBDelay),
88 fetchToCommitDelay(params->commitToFetchDelay),
89 renameWidth(params->renameWidth),
90 commitWidth(params->commitWidth),

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518}
519
520template <class Impl>
521void
522DefaultCommit<Impl>::generateTrapEvent(ThreadID tid, Fault inst_fault)
523{
524 DPRINTF(Commit, "Generating trap event for [tid:%i]\n", tid);
525
526 EventFunctionWrapper *trap = new EventFunctionWrapper(
527 [this, tid]{ processTrapEvent(tid); },
528 "Trap", true, Event::CPU_Tick_Pri);
529
530 Cycles latency = dynamic_pointer_cast<SyscallRetryFault>(inst_fault) ?
531 cpu->syscallRetryLatency : trapLatency;
532
533 cpu->schedule(trap, cpu->clockEdge(latency));
534 trapInFlight[tid] = true;
535 thread[tid]->trapPending = true;
536}

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