| commit.hh (2874:5389a28b80fb) | commit.hh (2935:d1223a6c9156) |
|---|---|
| 1/* 2 * Copyright (c) 2004-2006 The Regents of The University of Michigan 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions are 7 * met: redistributions of source code must retain the above copyright 8 * notice, this list of conditions and the following disclaimer; --- 272 unchanged lines hidden (view full) --- 281 void setPC(uint64_t val, unsigned tid) { PC[tid] = val; } 282 283 /** Reads the next PC of a specific thread. */ 284 uint64_t readNextPC(unsigned tid) { return nextPC[tid]; } 285 286 /** Sets the next PC of a specific thread. */ 287 void setNextPC(uint64_t val, unsigned tid) { nextPC[tid] = val; } 288 | 1/* 2 * Copyright (c) 2004-2006 The Regents of The University of Michigan 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions are 7 * met: redistributions of source code must retain the above copyright 8 * notice, this list of conditions and the following disclaimer; --- 272 unchanged lines hidden (view full) --- 281 void setPC(uint64_t val, unsigned tid) { PC[tid] = val; } 282 283 /** Reads the next PC of a specific thread. */ 284 uint64_t readNextPC(unsigned tid) { return nextPC[tid]; } 285 286 /** Sets the next PC of a specific thread. */ 287 void setNextPC(uint64_t val, unsigned tid) { nextPC[tid] = val; } 288 |
| 289#if THE_ISA != ALPHA_ISA | |
| 290 /** Reads the next NPC of a specific thread. */ | 289 /** Reads the next NPC of a specific thread. */ |
| 291 uint64_t readNextPC(unsigned tid) { return nextNPC[tid]; } | 290 uint64_t readNextNPC(unsigned tid) { return nextNPC[tid]; } |
| 292 293 /** Sets the next NPC of a specific thread. */ | 291 292 /** Sets the next NPC of a specific thread. */ |
| 294 void setNextPC(uint64_t val, unsigned tid) { nextNPC[tid] = val; } 295#endif | 293 void setNextNPC(uint64_t val, unsigned tid) { nextNPC[tid] = val; } |
| 296 297 private: 298 /** Time buffer interface. */ 299 TimeBuffer<TimeStruct> *timeBuffer; 300 301 /** Wire to write information heading to previous stages. */ 302 typename TimeBuffer<TimeStruct>::wire toIEW; 303 --- 88 unchanged lines hidden (view full) --- 392 /** The commit PC of each thread. Refers to the instruction that 393 * is currently being processed/committed. 394 */ 395 Addr PC[Impl::MaxThreads]; 396 397 /** The next PC of each thread. */ 398 Addr nextPC[Impl::MaxThreads]; 399 | 294 295 private: 296 /** Time buffer interface. */ 297 TimeBuffer<TimeStruct> *timeBuffer; 298 299 /** Wire to write information heading to previous stages. */ 300 typename TimeBuffer<TimeStruct>::wire toIEW; 301 --- 88 unchanged lines hidden (view full) --- 390 /** The commit PC of each thread. Refers to the instruction that 391 * is currently being processed/committed. 392 */ 393 Addr PC[Impl::MaxThreads]; 394 395 /** The next PC of each thread. */ 396 Addr nextPC[Impl::MaxThreads]; 397 |
| 400#if THE_ISA != ALPHA_ISA | |
| 401 /** The next NPC of each thread. */ 402 Addr nextNPC[Impl::MaxThreads]; | 398 /** The next NPC of each thread. */ 399 Addr nextNPC[Impl::MaxThreads]; |
| 403#endif | |
| 404 405 /** The sequence number of the youngest valid instruction in the ROB. */ 406 InstSeqNum youngestSeqNum[Impl::MaxThreads]; 407 408 /** Pointer to the list of active threads. */ 409 std::list<unsigned> *activeThreads; 410 411 /** Rename map interface. */ --- 43 unchanged lines hidden --- | 400 401 /** The sequence number of the youngest valid instruction in the ROB. */ 402 InstSeqNum youngestSeqNum[Impl::MaxThreads]; 403 404 /** Pointer to the list of active threads. */ 405 std::list<unsigned> *activeThreads; 406 407 /** Rename map interface. */ --- 43 unchanged lines hidden --- |