1/* 2 * Copyright (c) 2010-2012, 2014 ARM Limited 3 * All rights reserved. 4 * 5 * The license below extends only to copyright in the software and shall 6 * not be construed as granting a license to any other intellectual 7 * property including but not limited to intellectual property relating 8 * to a hardware implementation of the functionality of the software --- 87 unchanged lines hidden (view full) --- 96 typedef typename CPUPol::IEWStruct IEWStruct; 97 typedef typename CPUPol::RenameStruct RenameStruct; 98 99 typedef typename CPUPol::Fetch Fetch; 100 typedef typename CPUPol::IEW IEW; 101 102 typedef O3ThreadState<Impl> Thread; 103 |
104 /** Overall commit status. Used to determine if the CPU can deschedule 105 * itself due to a lack of activity. 106 */ 107 enum CommitStatus{ 108 Active, 109 Inactive 110 }; 111 --- 25 unchanged lines hidden (view full) --- 137 CommitPolicy commitPolicy; 138 139 /** Probe Points. */ 140 ProbePointArg<DynInstPtr> *ppCommit; 141 ProbePointArg<DynInstPtr> *ppCommitStall; 142 /** To probe when an instruction is squashed */ 143 ProbePointArg<DynInstPtr> *ppSquash; 144 |
145 /** Mark the thread as processing a trap. */ 146 void processTrapEvent(ThreadID tid); 147 |
148 public: 149 /** Construct a DefaultCommit with the given parameters. */ 150 DefaultCommit(O3CPU *_cpu, DerivO3CPUParams *params); 151 152 /** Returns the name of the DefaultCommit. */ 153 std::string name() const; 154 155 /** Registers statistics. */ --- 368 unchanged lines hidden --- |