base_dyn_inst.cc (2765:2962455d1c0a) base_dyn_inst.cc (2817:273f7fb94f83)
1/*
2 * Copyright (c) 2006 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;

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24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 *
28 * Authors: Kevin Lim
29 */
30
31#include "cpu/base_dyn_inst_impl.hh"
1/*
2 * Copyright (c) 2006 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;

--- 15 unchanged lines hidden (view full) ---

24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 *
28 * Authors: Kevin Lim
29 */
30
31#include "cpu/base_dyn_inst_impl.hh"
32#include "cpu/o3/alpha_cpu.hh"
33#include "cpu/o3/alpha_impl.hh"
32#include "cpu/o3/isa_specific.hh"
34
35// Explicit instantiation
36template class BaseDynInst<AlphaSimpleImpl>;
37
38template <>
39int
40BaseDynInst<AlphaSimpleImpl>::instcount = 0;
33
34// Explicit instantiation
35template class BaseDynInst<AlphaSimpleImpl>;
36
37template <>
38int
39BaseDynInst<AlphaSimpleImpl>::instcount = 0;