SConscript (9341:a0eff1e9c773) | SConscript (9480:d059f8a95a42) |
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1# -*- mode:python -*- 2 3# Copyright (c) 2006 The Regents of The University of Michigan 4# All rights reserved. 5# 6# Redistribution and use in source and binary forms, with or without 7# modification, are permitted provided that the following conditions are 8# met: redistributions of source code must retain the above copyright --- 29 unchanged lines hidden (view full) --- 38 DebugFlag('IQ') 39 40if 'O3CPU' in env['CPU_MODELS']: 41 SimObject('FUPool.py') 42 SimObject('FuncUnitConfig.py') 43 SimObject('O3CPU.py') 44 45 Source('base_dyn_inst.cc') | 1# -*- mode:python -*- 2 3# Copyright (c) 2006 The Regents of The University of Michigan 4# All rights reserved. 5# 6# Redistribution and use in source and binary forms, with or without 7# modification, are permitted provided that the following conditions are 8# met: redistributions of source code must retain the above copyright --- 29 unchanged lines hidden (view full) --- 38 DebugFlag('IQ') 39 40if 'O3CPU' in env['CPU_MODELS']: 41 SimObject('FUPool.py') 42 SimObject('FuncUnitConfig.py') 43 SimObject('O3CPU.py') 44 45 Source('base_dyn_inst.cc') |
46 Source('bpred_unit.cc') | |
47 Source('commit.cc') 48 Source('cpu.cc') 49 Source('deriv.cc') 50 Source('decode.cc') 51 Source('dyn_inst.cc') 52 Source('fetch.cc') 53 Source('free_list.cc') 54 Source('fu_pool.cc') --- 28 unchanged lines hidden --- | 46 Source('commit.cc') 47 Source('cpu.cc') 48 Source('deriv.cc') 49 Source('decode.cc') 50 Source('dyn_inst.cc') 51 Source('fetch.cc') 52 Source('free_list.cc') 53 Source('fu_pool.cc') --- 28 unchanged lines hidden --- |