| SConscript (4486:aaeb03a8a6e1) | SConscript (4497:17e34dbcc8b3) |
|---|---|
| 1# -*- mode:python -*- 2 3# Copyright (c) 2006 The Regents of The University of Michigan 4# All rights reserved. 5# 6# Redistribution and use in source and binary forms, with or without 7# modification, are permitted provided that the following conditions are 8# met: redistributions of source code must retain the above copyright --- 61 unchanged lines hidden (view full) --- 70 Source('sparc/cpu.cc') 71 Source('sparc/cpu_builder.cc') 72 Source('sparc/dyn_inst.cc') 73 Source('sparc/thread_context.cc') 74 else: 75 sys.exit('O3 CPU does not support the \'%s\' ISA' % env['TARGET_ISA']) 76 77 if env['USE_CHECKER']: | 1# -*- mode:python -*- 2 3# Copyright (c) 2006 The Regents of The University of Michigan 4# All rights reserved. 5# 6# Redistribution and use in source and binary forms, with or without 7# modification, are permitted provided that the following conditions are 8# met: redistributions of source code must retain the above copyright --- 61 unchanged lines hidden (view full) --- 70 Source('sparc/cpu.cc') 71 Source('sparc/cpu_builder.cc') 72 Source('sparc/dyn_inst.cc') 73 Source('sparc/thread_context.cc') 74 else: 75 sys.exit('O3 CPU does not support the \'%s\' ISA' % env['TARGET_ISA']) 76 77 if env['USE_CHECKER']: |
| 78 SimObject('m5/objects/O3Checker.py') | 78 SimObject('O3Checker.py') |
| 79 Source('checker_builder.cc') 80 81if 'O3CPU' in env['CPU_MODELS'] or 'OzoneCPU' in env['CPU_MODELS']: 82 Source('2bit_local_pred.cc') 83 Source('btb.cc') 84 Source('ras.cc') 85 Source('tournament_pred.cc') 86 | 79 Source('checker_builder.cc') 80 81if 'O3CPU' in env['CPU_MODELS'] or 'OzoneCPU' in env['CPU_MODELS']: 82 Source('2bit_local_pred.cc') 83 Source('btb.cc') 84 Source('ras.cc') 85 Source('tournament_pred.cc') 86 |