O3CPU.py (8707:489489c67fd9) O3CPU.py (8727:b3995530319f)
1# Copyright (c) 2005-2007 The Regents of The University of Michigan
2# All rights reserved.
3#
4# Redistribution and use in source and binary forms, with or without
5# modification, are permitted provided that the following conditions are
6# met: redistributions of source code must retain the above copyright
7# notice, this list of conditions and the following disclaimer;
8# redistributions in binary form must reproduce the above copyright

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138 smtLSQPolicy = Param.String('Partitioned', "SMT LSQ Sharing Policy")
139 smtLSQThreshold = Param.Int(100, "SMT LSQ Threshold Sharing Parameter")
140 smtIQPolicy = Param.String('Partitioned', "SMT IQ Sharing Policy")
141 smtIQThreshold = Param.Int(100, "SMT IQ Threshold Sharing Parameter")
142 smtROBPolicy = Param.String('Partitioned', "SMT ROB Sharing Policy")
143 smtROBThreshold = Param.Int(100, "SMT ROB Threshold Sharing Parameter")
144 smtCommitPolicy = Param.String('RoundRobin', "SMT Commit Policy")
145
1# Copyright (c) 2005-2007 The Regents of The University of Michigan
2# All rights reserved.
3#
4# Redistribution and use in source and binary forms, with or without
5# modification, are permitted provided that the following conditions are
6# met: redistributions of source code must retain the above copyright
7# notice, this list of conditions and the following disclaimer;
8# redistributions in binary form must reproduce the above copyright

--- 129 unchanged lines hidden (view full) ---

138 smtLSQPolicy = Param.String('Partitioned', "SMT LSQ Sharing Policy")
139 smtLSQThreshold = Param.Int(100, "SMT LSQ Threshold Sharing Parameter")
140 smtIQPolicy = Param.String('Partitioned', "SMT IQ Sharing Policy")
141 smtIQThreshold = Param.Int(100, "SMT IQ Threshold Sharing Parameter")
142 smtROBPolicy = Param.String('Partitioned', "SMT ROB Sharing Policy")
143 smtROBThreshold = Param.Int(100, "SMT ROB Threshold Sharing Parameter")
144 smtCommitPolicy = Param.String('RoundRobin', "SMT Commit Policy")
145
146 needsTSO = Param.Bool(buildEnv['TARGET_ISA'] == 'x86',
147 "Enable TSO Memory model")