O3CPU.py (13562:8fe39a3fc056) O3CPU.py (13563:68c171235dc5)
1# Copyright (c) 2016, 2019 ARM Limited
2# All rights reserved.
3#
4# The license below extends only to copyright in the software and shall
5# not be construed as granting a license to any other intellectual
6# property including but not limited to intellectual property relating
7# to a hardware implementation of the functionality of the software
8# licensed hereunder. You may use the software subject to the license

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49from BranchPredictor import *
50
51class FetchPolicy(ScopedEnum):
52 vals = [ 'SingleThread', 'RoundRobin', 'Branch', 'IQCount', 'LSQCount' ]
53
54class SMTQueuePolicy(ScopedEnum):
55 vals = [ 'Dynamic', 'Partitioned', 'Threshold' ]
56
1# Copyright (c) 2016, 2019 ARM Limited
2# All rights reserved.
3#
4# The license below extends only to copyright in the software and shall
5# not be construed as granting a license to any other intellectual
6# property including but not limited to intellectual property relating
7# to a hardware implementation of the functionality of the software
8# licensed hereunder. You may use the software subject to the license

--- 40 unchanged lines hidden (view full) ---

49from BranchPredictor import *
50
51class FetchPolicy(ScopedEnum):
52 vals = [ 'SingleThread', 'RoundRobin', 'Branch', 'IQCount', 'LSQCount' ]
53
54class SMTQueuePolicy(ScopedEnum):
55 vals = [ 'Dynamic', 'Partitioned', 'Threshold' ]
56
57class CommitPolicy(ScopedEnum):
58 vals = [ 'Aggressive', 'RoundRobin', 'OldestReady' ]
59
57class DerivO3CPU(BaseCPU):
58 type = 'DerivO3CPU'
59 cxx_header = 'cpu/o3/deriv.hh'
60
61 @classmethod
62 def memory_mode(cls):
63 return 'timing'
64

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158 "SMT LSQ Sharing Policy")
159 smtLSQThreshold = Param.Int(100, "SMT LSQ Threshold Sharing Parameter")
160 smtIQPolicy = Param.SMTQueuePolicy('Partitioned',
161 "SMT IQ Sharing Policy")
162 smtIQThreshold = Param.Int(100, "SMT IQ Threshold Sharing Parameter")
163 smtROBPolicy = Param.SMTQueuePolicy('Partitioned',
164 "SMT ROB Sharing Policy")
165 smtROBThreshold = Param.Int(100, "SMT ROB Threshold Sharing Parameter")
60class DerivO3CPU(BaseCPU):
61 type = 'DerivO3CPU'
62 cxx_header = 'cpu/o3/deriv.hh'
63
64 @classmethod
65 def memory_mode(cls):
66 return 'timing'
67

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161 "SMT LSQ Sharing Policy")
162 smtLSQThreshold = Param.Int(100, "SMT LSQ Threshold Sharing Parameter")
163 smtIQPolicy = Param.SMTQueuePolicy('Partitioned',
164 "SMT IQ Sharing Policy")
165 smtIQThreshold = Param.Int(100, "SMT IQ Threshold Sharing Parameter")
166 smtROBPolicy = Param.SMTQueuePolicy('Partitioned',
167 "SMT ROB Sharing Policy")
168 smtROBThreshold = Param.Int(100, "SMT ROB Threshold Sharing Parameter")
166 smtCommitPolicy = Param.String('RoundRobin', "SMT Commit Policy")
169 smtCommitPolicy = Param.CommitPolicy('RoundRobin', "SMT Commit Policy")
167
168 branchPred = Param.BranchPredictor(TournamentBP(numThreads =
169 Parent.numThreads),
170 "Branch Predictor")
171 needsTSO = Param.Bool(buildEnv['TARGET_ISA'] == 'x86',
172 "Enable TSO Memory model")
173
174 def addCheckerCpu(self):

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171 branchPred = Param.BranchPredictor(TournamentBP(numThreads =
172 Parent.numThreads),
173 "Branch Predictor")
174 needsTSO = Param.Bool(buildEnv['TARGET_ISA'] == 'x86',
175 "Enable TSO Memory model")
176
177 def addCheckerCpu(self):

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