O3CPU.py (13559:e9983a972327) | O3CPU.py (13560:f8732494c155) |
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1# Copyright (c) 2016, 2019 ARM Limited 2# All rights reserved. 3# 4# The license below extends only to copyright in the software and shall 5# not be construed as granting a license to any other intellectual 6# property including but not limited to intellectual property relating 7# to a hardware implementation of the functionality of the software 8# licensed hereunder. You may use the software subject to the license --- 37 unchanged lines hidden (view full) --- 46from BaseCPU import BaseCPU 47from FUPool import * 48from O3Checker import O3Checker 49from BranchPredictor import * 50 51class FetchPolicy(ScopedEnum): 52 vals = [ 'SingleThread', 'RoundRobin', 'Branch', 'IQCount', 'LSQCount' ] 53 | 1# Copyright (c) 2016, 2019 ARM Limited 2# All rights reserved. 3# 4# The license below extends only to copyright in the software and shall 5# not be construed as granting a license to any other intellectual 6# property including but not limited to intellectual property relating 7# to a hardware implementation of the functionality of the software 8# licensed hereunder. You may use the software subject to the license --- 37 unchanged lines hidden (view full) --- 46from BaseCPU import BaseCPU 47from FUPool import * 48from O3Checker import O3Checker 49from BranchPredictor import * 50 51class FetchPolicy(ScopedEnum): 52 vals = [ 'SingleThread', 'RoundRobin', 'Branch', 'IQCount', 'LSQCount' ] 53 |
54class SMTQueuePolicy(ScopedEnum): 55 vals = [ 'Dynamic', 'Partitioned', 'Threshold' ] 56 |
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54class DerivO3CPU(BaseCPU): 55 type = 'DerivO3CPU' 56 cxx_header = 'cpu/o3/deriv.hh' 57 58 @classmethod 59 def memory_mode(cls): 60 return 'timing' 61 --- 84 unchanged lines hidden (view full) --- 146 "registers") 147 numPhysCCRegs = Param.Unsigned(_defaultNumPhysCCRegs, 148 "Number of physical cc registers") 149 numIQEntries = Param.Unsigned(64, "Number of instruction queue entries") 150 numROBEntries = Param.Unsigned(192, "Number of reorder buffer entries") 151 152 smtNumFetchingThreads = Param.Unsigned(1, "SMT Number of Fetching Threads") 153 smtFetchPolicy = Param.FetchPolicy('SingleThread', "SMT Fetch policy") | 57class DerivO3CPU(BaseCPU): 58 type = 'DerivO3CPU' 59 cxx_header = 'cpu/o3/deriv.hh' 60 61 @classmethod 62 def memory_mode(cls): 63 return 'timing' 64 --- 84 unchanged lines hidden (view full) --- 149 "registers") 150 numPhysCCRegs = Param.Unsigned(_defaultNumPhysCCRegs, 151 "Number of physical cc registers") 152 numIQEntries = Param.Unsigned(64, "Number of instruction queue entries") 153 numROBEntries = Param.Unsigned(192, "Number of reorder buffer entries") 154 155 smtNumFetchingThreads = Param.Unsigned(1, "SMT Number of Fetching Threads") 156 smtFetchPolicy = Param.FetchPolicy('SingleThread', "SMT Fetch policy") |
154 smtLSQPolicy = Param.String('Partitioned', "SMT LSQ Sharing Policy") | 157 smtLSQPolicy = Param.SMTQueuePolicy('Partitioned', 158 "SMT LSQ Sharing Policy") |
155 smtLSQThreshold = Param.Int(100, "SMT LSQ Threshold Sharing Parameter") 156 smtIQPolicy = Param.String('Partitioned', "SMT IQ Sharing Policy") 157 smtIQThreshold = Param.Int(100, "SMT IQ Threshold Sharing Parameter") 158 smtROBPolicy = Param.String('Partitioned', "SMT ROB Sharing Policy") 159 smtROBThreshold = Param.Int(100, "SMT ROB Threshold Sharing Parameter") 160 smtCommitPolicy = Param.String('RoundRobin', "SMT Commit Policy") 161 162 branchPred = Param.BranchPredictor(TournamentBP(numThreads = --- 20 unchanged lines hidden --- | 159 smtLSQThreshold = Param.Int(100, "SMT LSQ Threshold Sharing Parameter") 160 smtIQPolicy = Param.String('Partitioned', "SMT IQ Sharing Policy") 161 smtIQThreshold = Param.Int(100, "SMT IQ Threshold Sharing Parameter") 162 smtROBPolicy = Param.String('Partitioned', "SMT ROB Sharing Policy") 163 smtROBThreshold = Param.Int(100, "SMT ROB Threshold Sharing Parameter") 164 smtCommitPolicy = Param.String('RoundRobin', "SMT Commit Policy") 165 166 branchPred = Param.BranchPredictor(TournamentBP(numThreads = --- 20 unchanged lines hidden --- |