O3CPU.py (9982:b2bfc23f932c) | O3CPU.py (10327:5b6279635c49) |
---|---|
1# Copyright (c) 2005-2007 The Regents of The University of Michigan 2# All rights reserved. 3# 4# Redistribution and use in source and binary forms, with or without 5# modification, are permitted provided that the following conditions are 6# met: redistributions of source code must retain the above copyright 7# notice, this list of conditions and the following disclaimer; 8# redistributions in binary form must reproduce the above copyright --- 70 unchanged lines hidden (view full) --- 79 "Issue/Execute/Writeback delay") 80 renameToIEWDelay = Param.Cycles(2, "Rename to " 81 "Issue/Execute/Writeback delay") 82 issueToExecuteDelay = Param.Cycles(1, "Issue to execute delay (internal " 83 "to the IEW stage)") 84 dispatchWidth = Param.Unsigned(8, "Dispatch width") 85 issueWidth = Param.Unsigned(8, "Issue width") 86 wbWidth = Param.Unsigned(8, "Writeback width") | 1# Copyright (c) 2005-2007 The Regents of The University of Michigan 2# All rights reserved. 3# 4# Redistribution and use in source and binary forms, with or without 5# modification, are permitted provided that the following conditions are 6# met: redistributions of source code must retain the above copyright 7# notice, this list of conditions and the following disclaimer; 8# redistributions in binary form must reproduce the above copyright --- 70 unchanged lines hidden (view full) --- 79 "Issue/Execute/Writeback delay") 80 renameToIEWDelay = Param.Cycles(2, "Rename to " 81 "Issue/Execute/Writeback delay") 82 issueToExecuteDelay = Param.Cycles(1, "Issue to execute delay (internal " 83 "to the IEW stage)") 84 dispatchWidth = Param.Unsigned(8, "Dispatch width") 85 issueWidth = Param.Unsigned(8, "Issue width") 86 wbWidth = Param.Unsigned(8, "Writeback width") |
87 wbDepth = Param.Unsigned(1, "Writeback depth") | |
88 fuPool = Param.FUPool(DefaultFUPool(), "Functional Unit pool") 89 90 iewToCommitDelay = Param.Cycles(1, "Issue/Execute/Writeback to commit " 91 "delay") 92 renameToROBDelay = Param.Cycles(1, "Rename to reorder buffer delay") 93 commitWidth = Param.Unsigned(8, "Commit width") 94 squashWidth = Param.Unsigned(8, "Squash width") 95 trapLatency = Param.Cycles(13, "Trap latency") --- 66 unchanged lines hidden --- | 87 fuPool = Param.FUPool(DefaultFUPool(), "Functional Unit pool") 88 89 iewToCommitDelay = Param.Cycles(1, "Issue/Execute/Writeback to commit " 90 "delay") 91 renameToROBDelay = Param.Cycles(1, "Rename to reorder buffer delay") 92 commitWidth = Param.Unsigned(8, "Commit width") 93 squashWidth = Param.Unsigned(8, "Squash width") 94 trapLatency = Param.Cycles(13, "Trap latency") --- 66 unchanged lines hidden --- |