1# Copyright (c) 2005-2007 The Regents of The University of Michigan
2# All rights reserved.
3#
4# Redistribution and use in source and binary forms, with or without
5# modification, are permitted provided that the following conditions are
6# met: redistributions of source code must retain the above copyright
7# notice, this list of conditions and the following disclaimer;
8# redistributions in binary form must reproduce the above copyright

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35if buildEnv['USE_CHECKER']:
36 from O3Checker import O3Checker
37
38class DerivO3CPU(BaseCPU):
39 type = 'DerivO3CPU'
40 activity = Param.Unsigned(0, "Initial count")
41
42 if buildEnv['USE_CHECKER']:
43 checker = Param.BaseCPU(O3Checker(workload=Parent.workload,
44 exitOnError=False,
45 updateOnError=True,
46 warnOnlyOnLoadError=False),
47 "checker")
48 checker.itb = Parent.itb
49 checker.dtb = Parent.dtb
50
51 cachePorts = Param.Unsigned(200, "Cache Ports")
52 icache_port = Port("Instruction Port")
53 dcache_port = Port("Data Port")
54 _cached_ports = BaseCPU._cached_ports + ['icache_port', 'dcache_port']
55
56 decodeToFetchDelay = Param.Unsigned(1, "Decode to fetch delay")
57 renameToFetchDelay = Param.Unsigned(1 ,"Rename to fetch delay")
58 iewToFetchDelay = Param.Unsigned(1, "Issue/Execute/Writeback to fetch "
59 "delay")
60 commitToFetchDelay = Param.Unsigned(1, "Commit to fetch delay")
61 fetchWidth = Param.Unsigned(8, "Fetch width")
62

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137 smtLSQPolicy = Param.String('Partitioned', "SMT LSQ Sharing Policy")
138 smtLSQThreshold = Param.Int(100, "SMT LSQ Threshold Sharing Parameter")
139 smtIQPolicy = Param.String('Partitioned', "SMT IQ Sharing Policy")
140 smtIQThreshold = Param.Int(100, "SMT IQ Threshold Sharing Parameter")
141 smtROBPolicy = Param.String('Partitioned', "SMT ROB Sharing Policy")
142 smtROBThreshold = Param.Int(100, "SMT ROB Threshold Sharing Parameter")
143 smtCommitPolicy = Param.String('RoundRobin', "SMT Commit Policy")
144
145 def addPrivateSplitL1Caches(self, ic, dc, iwc = None, dwc = None):
146 BaseCPU.addPrivateSplitL1Caches(self, ic, dc, iwc, dwc)
147 self.icache.tgts_per_mshr = 20
148 self.dcache.tgts_per_mshr = 20