FUPool.py (13665:9c7fe3811b88) FUPool.py (13759:9941fca869a9)
1# Copyright (c) 2017 ARM Limited
2# All rights reserved
3#
4# The license below extends only to copyright in the software and shall
5# not be construed as granting a license to any other intellectual
6# property including but not limited to intellectual property relating
7# to a hardware implementation of the functionality of the software
8# licensed hereunder. You may use the software subject to the license
9# terms below provided that you ensure that this notice is replicated
10# unmodified and in its entirety in all distributions of the software,
11# modified or unmodified, in source code or in binary form.
12#
1# Copyright (c) 2006-2007 The Regents of The University of Michigan
2# All rights reserved.
3#
4# Redistribution and use in source and binary forms, with or without
5# modification, are permitted provided that the following conditions are
6# met: redistributions of source code must retain the above copyright
7# notice, this list of conditions and the following disclaimer;
8# redistributions in binary form must reproduce the above copyright

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33
34class FUPool(SimObject):
35 type = 'FUPool'
36 cxx_header = "cpu/o3/fu_pool.hh"
37 FUList = VectorParam.FUDesc("list of FU's for this pool")
38
39class DefaultFUPool(FUPool):
40 FUList = [ IntALU(), IntMultDiv(), FP_ALU(), FP_MultDiv(), ReadPort(),
13# Copyright (c) 2006-2007 The Regents of The University of Michigan
14# All rights reserved.
15#
16# Redistribution and use in source and binary forms, with or without
17# modification, are permitted provided that the following conditions are
18# met: redistributions of source code must retain the above copyright
19# notice, this list of conditions and the following disclaimer;
20# redistributions in binary form must reproduce the above copyright

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45
46class FUPool(SimObject):
47 type = 'FUPool'
48 cxx_header = "cpu/o3/fu_pool.hh"
49 FUList = VectorParam.FUDesc("list of FU's for this pool")
50
51class DefaultFUPool(FUPool):
52 FUList = [ IntALU(), IntMultDiv(), FP_ALU(), FP_MultDiv(), ReadPort(),
41 SIMD_Unit(), WritePort(), RdWrPort(), IprPort() ]
53 SIMD_Unit(), PredALU(), WritePort(), RdWrPort(), IprPort() ]