1/* 2 * Copyright (c) 2001-2005 The Regents of The University of Michigan 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions are 7 * met: redistributions of source code must retain the above copyright 8 * notice, this list of conditions and the following disclaimer; 9 * redistributions in binary form must reproduce the above copyright 10 * notice, this list of conditions and the following disclaimer in the 11 * documentation and/or other materials provided with the distribution; 12 * neither the name of the copyright holders nor the names of its 13 * contributors may be used to endorse or promote products derived from 14 * this software without specific prior written permission. 15 * 16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 17 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 18 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 19 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 20 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 21 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 22 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 27 * 28 * Authors: Steve Reinhardt 29 * Nathan Binkert 30 */ 31 32#ifndef __NATIVETRACE_HH__ 33#define __NATIVETRACE_HH__ 34 35#include "base/trace.hh" 36#include "cpu/static_inst.hh"
| 1/* 2 * Copyright (c) 2001-2005 The Regents of The University of Michigan 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions are 7 * met: redistributions of source code must retain the above copyright 8 * notice, this list of conditions and the following disclaimer; 9 * redistributions in binary form must reproduce the above copyright 10 * notice, this list of conditions and the following disclaimer in the 11 * documentation and/or other materials provided with the distribution; 12 * neither the name of the copyright holders nor the names of its 13 * contributors may be used to endorse or promote products derived from 14 * this software without specific prior written permission. 15 * 16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 17 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 18 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 19 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 20 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 21 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 22 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 27 * 28 * Authors: Steve Reinhardt 29 * Nathan Binkert 30 */ 31 32#ifndef __NATIVETRACE_HH__ 33#define __NATIVETRACE_HH__ 34 35#include "base/trace.hh" 36#include "cpu/static_inst.hh"
|
38#include "sim/insttracer.hh" 39#include "arch/x86/intregs.hh" 40#include "arch/x86/floatregs.hh" 41 42class ThreadContext; 43 44 45namespace Trace { 46 47class NativeTrace; 48 49class NativeTraceRecord : public InstRecord 50{ 51 protected: 52 NativeTrace * parent; 53 54 public: 55 NativeTraceRecord(NativeTrace * _parent, 56 Tick _when, ThreadContext *_thread, 57 const StaticInstPtr _staticInst, Addr _pc, bool spec, 58 const StaticInstPtr _macroStaticInst = NULL, MicroPC _upc = 0) 59 : InstRecord(_when, _thread, _staticInst, _pc, spec, 60 _macroStaticInst, _upc), 61 parent(_parent) 62 { 63 } 64 65 void dump(); 66}; 67 68class NativeTrace : public InstTracer 69{ 70 protected: 71 int fd; 72 73 ListenSocket native_listener; 74 75 bool checkRcx; 76 bool checkR11; 77 uint64_t oldRcxVal, oldR11Val; 78 uint64_t oldRealRcxVal, oldRealR11Val; 79 80 struct ThreadState { 81 uint64_t rax; 82 uint64_t rcx; 83 uint64_t rdx; 84 uint64_t rbx; 85 uint64_t rsp; 86 uint64_t rbp; 87 uint64_t rsi; 88 uint64_t rdi; 89 uint64_t r8; 90 uint64_t r9; 91 uint64_t r10; 92 uint64_t r11; 93 uint64_t r12; 94 uint64_t r13; 95 uint64_t r14; 96 uint64_t r15; 97 uint64_t rip; 98 //This should be expanded to 16 if x87 registers are considered 99 uint64_t mmx[8]; 100 uint64_t xmm[32]; 101 102 void update(int fd) 103 { 104 int bytesLeft = sizeof(ThreadState); 105 int bytesRead = 0; 106 do 107 { 108 int res = read(fd, ((char *)this) + bytesRead, bytesLeft); 109 if(res < 0) 110 panic("Read call failed! %s\n", strerror(errno)); 111 bytesLeft -= res; 112 bytesRead += res; 113 } while(bytesLeft); 114 rax = TheISA::gtoh(rax); 115 rcx = TheISA::gtoh(rcx); 116 rdx = TheISA::gtoh(rdx); 117 rbx = TheISA::gtoh(rbx); 118 rsp = TheISA::gtoh(rsp); 119 rbp = TheISA::gtoh(rbp); 120 rsi = TheISA::gtoh(rsi); 121 rdi = TheISA::gtoh(rdi); 122 r8 = TheISA::gtoh(r8); 123 r9 = TheISA::gtoh(r9); 124 r10 = TheISA::gtoh(r10); 125 r11 = TheISA::gtoh(r11); 126 r12 = TheISA::gtoh(r12); 127 r13 = TheISA::gtoh(r13); 128 r14 = TheISA::gtoh(r14); 129 r15 = TheISA::gtoh(r15); 130 rip = TheISA::gtoh(rip); 131 //This should be expanded if x87 registers are considered 132 for (int i = 0; i < 8; i++) 133 mmx[i] = TheISA::gtoh(mmx[i]); 134 for (int i = 0; i < 32; i++) 135 xmm[i] = TheISA::gtoh(xmm[i]); 136 } 137 138 void update(ThreadContext * tc) 139 { 140 rax = tc->readIntReg(X86ISA::INTREG_RAX); 141 rcx = tc->readIntReg(X86ISA::INTREG_RCX); 142 rdx = tc->readIntReg(X86ISA::INTREG_RDX); 143 rbx = tc->readIntReg(X86ISA::INTREG_RBX); 144 rsp = tc->readIntReg(X86ISA::INTREG_RSP); 145 rbp = tc->readIntReg(X86ISA::INTREG_RBP); 146 rsi = tc->readIntReg(X86ISA::INTREG_RSI); 147 rdi = tc->readIntReg(X86ISA::INTREG_RDI); 148 r8 = tc->readIntReg(X86ISA::INTREG_R8); 149 r9 = tc->readIntReg(X86ISA::INTREG_R9); 150 r10 = tc->readIntReg(X86ISA::INTREG_R10); 151 r11 = tc->readIntReg(X86ISA::INTREG_R11); 152 r12 = tc->readIntReg(X86ISA::INTREG_R12); 153 r13 = tc->readIntReg(X86ISA::INTREG_R13); 154 r14 = tc->readIntReg(X86ISA::INTREG_R14); 155 r15 = tc->readIntReg(X86ISA::INTREG_R15); 156 rip = tc->readNextPC(); 157 //This should be expanded if x87 registers are considered 158 for (int i = 0; i < 8; i++) 159 mmx[i] = tc->readFloatRegBits(X86ISA::FLOATREG_MMX(i)); 160 for (int i = 0; i < 32; i++) 161 xmm[i] = tc->readFloatRegBits(X86ISA::FLOATREG_XMM_BASE + i); 162 } 163 164 }; 165 166 ThreadState nState; 167 ThreadState mState; 168 169 170 public: 171 172 template<class T> 173 bool 174 checkReg(const char * regName, T &val, T &realVal) 175 { 176 if(val != realVal) 177 { 178 DPRINTFN("Register %s should be %#x but is %#x.\n", 179 regName, realVal, val); 180 return false; 181 } 182 return true; 183 } 184 185 bool 186 checkRcxReg(const char * regName, uint64_t &, uint64_t &); 187 188 bool 189 checkR11Reg(const char * regName, uint64_t &, uint64_t &); 190 191 bool 192 checkXMM(int num, uint64_t mXmmBuf[], uint64_t nXmmBuf[]); 193 194 NativeTrace(const Params *p); 195 196 NativeTraceRecord * 197 getInstRecord(Tick when, ThreadContext *tc, 198 const StaticInstPtr staticInst, Addr pc, 199 const StaticInstPtr macroStaticInst = NULL, MicroPC upc = 0) 200 { 201 if (tc->misspeculating()) 202 return NULL; 203 204 return new NativeTraceRecord(this, when, tc, 205 staticInst, pc, tc->misspeculating(), macroStaticInst, upc); 206 } 207 208 void 209 check(ThreadContext *, bool syscall); 210 211 friend class NativeTraceRecord; 212}; 213 214/* namespace Trace */ } 215 216#endif // __EXETRACE_HH__
| 38#include "sim/insttracer.hh" 39#include "arch/x86/intregs.hh" 40#include "arch/x86/floatregs.hh" 41 42class ThreadContext; 43 44 45namespace Trace { 46 47class NativeTrace; 48 49class NativeTraceRecord : public InstRecord 50{ 51 protected: 52 NativeTrace * parent; 53 54 public: 55 NativeTraceRecord(NativeTrace * _parent, 56 Tick _when, ThreadContext *_thread, 57 const StaticInstPtr _staticInst, Addr _pc, bool spec, 58 const StaticInstPtr _macroStaticInst = NULL, MicroPC _upc = 0) 59 : InstRecord(_when, _thread, _staticInst, _pc, spec, 60 _macroStaticInst, _upc), 61 parent(_parent) 62 { 63 } 64 65 void dump(); 66}; 67 68class NativeTrace : public InstTracer 69{ 70 protected: 71 int fd; 72 73 ListenSocket native_listener; 74 75 bool checkRcx; 76 bool checkR11; 77 uint64_t oldRcxVal, oldR11Val; 78 uint64_t oldRealRcxVal, oldRealR11Val; 79 80 struct ThreadState { 81 uint64_t rax; 82 uint64_t rcx; 83 uint64_t rdx; 84 uint64_t rbx; 85 uint64_t rsp; 86 uint64_t rbp; 87 uint64_t rsi; 88 uint64_t rdi; 89 uint64_t r8; 90 uint64_t r9; 91 uint64_t r10; 92 uint64_t r11; 93 uint64_t r12; 94 uint64_t r13; 95 uint64_t r14; 96 uint64_t r15; 97 uint64_t rip; 98 //This should be expanded to 16 if x87 registers are considered 99 uint64_t mmx[8]; 100 uint64_t xmm[32]; 101 102 void update(int fd) 103 { 104 int bytesLeft = sizeof(ThreadState); 105 int bytesRead = 0; 106 do 107 { 108 int res = read(fd, ((char *)this) + bytesRead, bytesLeft); 109 if(res < 0) 110 panic("Read call failed! %s\n", strerror(errno)); 111 bytesLeft -= res; 112 bytesRead += res; 113 } while(bytesLeft); 114 rax = TheISA::gtoh(rax); 115 rcx = TheISA::gtoh(rcx); 116 rdx = TheISA::gtoh(rdx); 117 rbx = TheISA::gtoh(rbx); 118 rsp = TheISA::gtoh(rsp); 119 rbp = TheISA::gtoh(rbp); 120 rsi = TheISA::gtoh(rsi); 121 rdi = TheISA::gtoh(rdi); 122 r8 = TheISA::gtoh(r8); 123 r9 = TheISA::gtoh(r9); 124 r10 = TheISA::gtoh(r10); 125 r11 = TheISA::gtoh(r11); 126 r12 = TheISA::gtoh(r12); 127 r13 = TheISA::gtoh(r13); 128 r14 = TheISA::gtoh(r14); 129 r15 = TheISA::gtoh(r15); 130 rip = TheISA::gtoh(rip); 131 //This should be expanded if x87 registers are considered 132 for (int i = 0; i < 8; i++) 133 mmx[i] = TheISA::gtoh(mmx[i]); 134 for (int i = 0; i < 32; i++) 135 xmm[i] = TheISA::gtoh(xmm[i]); 136 } 137 138 void update(ThreadContext * tc) 139 { 140 rax = tc->readIntReg(X86ISA::INTREG_RAX); 141 rcx = tc->readIntReg(X86ISA::INTREG_RCX); 142 rdx = tc->readIntReg(X86ISA::INTREG_RDX); 143 rbx = tc->readIntReg(X86ISA::INTREG_RBX); 144 rsp = tc->readIntReg(X86ISA::INTREG_RSP); 145 rbp = tc->readIntReg(X86ISA::INTREG_RBP); 146 rsi = tc->readIntReg(X86ISA::INTREG_RSI); 147 rdi = tc->readIntReg(X86ISA::INTREG_RDI); 148 r8 = tc->readIntReg(X86ISA::INTREG_R8); 149 r9 = tc->readIntReg(X86ISA::INTREG_R9); 150 r10 = tc->readIntReg(X86ISA::INTREG_R10); 151 r11 = tc->readIntReg(X86ISA::INTREG_R11); 152 r12 = tc->readIntReg(X86ISA::INTREG_R12); 153 r13 = tc->readIntReg(X86ISA::INTREG_R13); 154 r14 = tc->readIntReg(X86ISA::INTREG_R14); 155 r15 = tc->readIntReg(X86ISA::INTREG_R15); 156 rip = tc->readNextPC(); 157 //This should be expanded if x87 registers are considered 158 for (int i = 0; i < 8; i++) 159 mmx[i] = tc->readFloatRegBits(X86ISA::FLOATREG_MMX(i)); 160 for (int i = 0; i < 32; i++) 161 xmm[i] = tc->readFloatRegBits(X86ISA::FLOATREG_XMM_BASE + i); 162 } 163 164 }; 165 166 ThreadState nState; 167 ThreadState mState; 168 169 170 public: 171 172 template<class T> 173 bool 174 checkReg(const char * regName, T &val, T &realVal) 175 { 176 if(val != realVal) 177 { 178 DPRINTFN("Register %s should be %#x but is %#x.\n", 179 regName, realVal, val); 180 return false; 181 } 182 return true; 183 } 184 185 bool 186 checkRcxReg(const char * regName, uint64_t &, uint64_t &); 187 188 bool 189 checkR11Reg(const char * regName, uint64_t &, uint64_t &); 190 191 bool 192 checkXMM(int num, uint64_t mXmmBuf[], uint64_t nXmmBuf[]); 193 194 NativeTrace(const Params *p); 195 196 NativeTraceRecord * 197 getInstRecord(Tick when, ThreadContext *tc, 198 const StaticInstPtr staticInst, Addr pc, 199 const StaticInstPtr macroStaticInst = NULL, MicroPC upc = 0) 200 { 201 if (tc->misspeculating()) 202 return NULL; 203 204 return new NativeTraceRecord(this, when, tc, 205 staticInst, pc, tc->misspeculating(), macroStaticInst, upc); 206 } 207 208 void 209 check(ThreadContext *, bool syscall); 210 211 friend class NativeTraceRecord; 212}; 213 214/* namespace Trace */ } 215 216#endif // __EXETRACE_HH__
|