nativetrace.cc (6329:5d8b91875859) nativetrace.cc (6365:a3037fa327a0)
1/*
1/*
2 * Copyright (c) 2001-2005 The Regents of The University of Michigan
2 * Copyright (c) 2006-2009 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;
9 * redistributions in binary form must reproduce the above copyright
10 * notice, this list of conditions and the following disclaimer in the

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20 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
21 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
22 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 *
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;
9 * redistributions in binary form must reproduce the above copyright
10 * notice, this list of conditions and the following disclaimer in the

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20 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
21 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
22 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 *
28 * Authors: Steve Reinhardt
29 * Lisa Hsu
30 * Nathan Binkert
31 * Steve Raasch
28 * Authors: Gabe Black
32 */
33
29 */
30
34#include <errno.h>
35
36#include "arch/registers.hh"
37#include "arch/utility.hh"
38#include "base/loader/symtab.hh"
39#include "base/socket.hh"
40#include "cpu/nativetrace.hh"
41#include "cpu/static_inst.hh"
31#include "base/socket.hh"
32#include "cpu/nativetrace.hh"
33#include "cpu/static_inst.hh"
42#include "cpu/thread_context.hh"
43#include "params/NativeTrace.hh"
44
34#include "params/NativeTrace.hh"
35
45//XXX This is temporary
46#include "arch/isa_specific.hh"
47
48using namespace std;
36using namespace std;
49using namespace TheISA;
50
51namespace Trace {
52
53NativeTrace::NativeTrace(const Params *p)
54 : InstTracer(p)
55{
56 if (ListenSocket::allDisabled())
57 fatal("All listeners are disabled!");
58
59 int port = 8000;
60 while(!native_listener.listen(port, true))
61 {
62 DPRINTF(GDBMisc, "Can't bind port %d\n", port);
63 port++;
64 }
65 ccprintf(cerr, "Listening for native process on port %d\n", port);
66 fd = native_listener.accept();
37
38namespace Trace {
39
40NativeTrace::NativeTrace(const Params *p)
41 : InstTracer(p)
42{
43 if (ListenSocket::allDisabled())
44 fatal("All listeners are disabled!");
45
46 int port = 8000;
47 while(!native_listener.listen(port, true))
48 {
49 DPRINTF(GDBMisc, "Can't bind port %d\n", port);
50 port++;
51 }
52 ccprintf(cerr, "Listening for native process on port %d\n", port);
53 fd = native_listener.accept();
67 checkRcx = true;
68 checkR11 = true;
69}
70
54}
55
71bool
72NativeTrace::checkRcxReg(const char * name, uint64_t &mVal, uint64_t &nVal)
73{
74 if(!checkRcx)
75 checkRcx = (mVal != oldRcxVal || nVal != oldRealRcxVal);
76 if(checkRcx)
77 return checkReg(name, mVal, nVal);
78 return true;
79}
80
81bool
82NativeTrace::checkR11Reg(const char * name, uint64_t &mVal, uint64_t &nVal)
83{
84 if(!checkR11)
85 checkR11 = (mVal != oldR11Val || nVal != oldRealR11Val);
86 if(checkR11)
87 return checkReg(name, mVal, nVal);
88 return true;
89}
90
91bool
92NativeTrace::checkXMM(int num, uint64_t mXmmBuf[], uint64_t nXmmBuf[])
93{
94 if (mXmmBuf[num * 2] != nXmmBuf[num * 2] ||
95 mXmmBuf[num * 2 + 1] != nXmmBuf[num * 2 + 1]) {
96 DPRINTFN("Register xmm%d should be 0x%016x%016x but is 0x%016x%016x.\n",
97 num, nXmmBuf[num * 2 + 1], nXmmBuf[num * 2],
98 mXmmBuf[num * 2 + 1], mXmmBuf[num * 2]);
99 return false;
100 }
101 return true;
102}
103
104void
105Trace::NativeTraceRecord::dump()
106{
107 //Don't print what happens for each micro-op, just print out
108 //once at the last op, and for regular instructions.
56void
57Trace::NativeTraceRecord::dump()
58{
59 //Don't print what happens for each micro-op, just print out
60 //once at the last op, and for regular instructions.
109 if(!staticInst->isMicroop() || staticInst->isLastMicroop())
110 parent->check(thread, staticInst->isSyscall());
61 if (!staticInst->isMicroop() || staticInst->isLastMicroop())
62 parent->check(this);
111}
112
63}
64
113void
114Trace::NativeTrace::check(ThreadContext * tc, bool isSyscall)
115{
116// ostream &outs = Trace::output();
117 nState.update(fd);
118 mState.update(tc);
119
120 if(isSyscall)
121 {
122 checkRcx = false;
123 checkR11 = false;
124 oldRcxVal = mState.rcx;
125 oldRealRcxVal = nState.rcx;
126 oldR11Val = mState.r11;
127 oldRealR11Val = nState.r11;
128 }
129
130 checkReg("rax", mState.rax, nState.rax);
131 checkRcxReg("rcx", mState.rcx, nState.rcx);
132 checkReg("rdx", mState.rdx, nState.rdx);
133 checkReg("rbx", mState.rbx, nState.rbx);
134 checkReg("rsp", mState.rsp, nState.rsp);
135 checkReg("rbp", mState.rbp, nState.rbp);
136 checkReg("rsi", mState.rsi, nState.rsi);
137 checkReg("rdi", mState.rdi, nState.rdi);
138 checkReg("r8", mState.r8, nState.r8);
139 checkReg("r9", mState.r9, nState.r9);
140 checkReg("r10", mState.r10, nState.r10);
141 checkR11Reg("r11", mState.r11, nState.r11);
142 checkReg("r12", mState.r12, nState.r12);
143 checkReg("r13", mState.r13, nState.r13);
144 checkReg("r14", mState.r14, nState.r14);
145 checkReg("r15", mState.r15, nState.r15);
146 checkReg("rip", mState.rip, nState.rip);
147 checkXMM(0, mState.xmm, nState.xmm);
148 checkXMM(1, mState.xmm, nState.xmm);
149 checkXMM(2, mState.xmm, nState.xmm);
150 checkXMM(3, mState.xmm, nState.xmm);
151 checkXMM(4, mState.xmm, nState.xmm);
152 checkXMM(5, mState.xmm, nState.xmm);
153 checkXMM(6, mState.xmm, nState.xmm);
154 checkXMM(7, mState.xmm, nState.xmm);
155 checkXMM(8, mState.xmm, nState.xmm);
156 checkXMM(9, mState.xmm, nState.xmm);
157 checkXMM(10, mState.xmm, nState.xmm);
158 checkXMM(11, mState.xmm, nState.xmm);
159 checkXMM(12, mState.xmm, nState.xmm);
160 checkXMM(13, mState.xmm, nState.xmm);
161 checkXMM(14, mState.xmm, nState.xmm);
162 checkXMM(15, mState.xmm, nState.xmm);
163#if THE_ISA == SPARC_ISA
164 /*for(int f = 0; f <= 62; f+=2)
165 {
166 uint64_t regVal;
167 int res = read(fd, &regVal, sizeof(regVal));
168 if(res < 0)
169 panic("First read call failed! %s\n", strerror(errno));
170 regVal = TheISA::gtoh(regVal);
171 uint64_t realRegVal = thread->readFloatRegBits(f, 64);
172 if(regVal != realRegVal)
173 {
174 DPRINTF(ExecRegDelta, "Register f%d should be %#x but is %#x.\n", f, regVal, realRegVal);
175 }
176 }*/
177 uint64_t regVal;
178 int res = read(fd, &regVal, sizeof(regVal));
179 if(res < 0)
180 panic("First read call failed! %s\n", strerror(errno));
181 regVal = TheISA::gtoh(regVal);
182 uint64_t realRegVal = thread->readNextPC();
183 if(regVal != realRegVal)
184 {
185 DPRINTF(ExecRegDelta,
186 "Register pc should be %#x but is %#x.\n",
187 regVal, realRegVal);
188 }
189 res = read(fd, &regVal, sizeof(regVal));
190 if(res < 0)
191 panic("First read call failed! %s\n", strerror(errno));
192 regVal = TheISA::gtoh(regVal);
193 realRegVal = thread->readNextNPC();
194 if(regVal != realRegVal)
195 {
196 DPRINTF(ExecRegDelta,
197 "Register npc should be %#x but is %#x.\n",
198 regVal, realRegVal);
199 }
200 res = read(fd, &regVal, sizeof(regVal));
201 if(res < 0)
202 panic("First read call failed! %s\n", strerror(errno));
203 regVal = TheISA::gtoh(regVal);
204 realRegVal = thread->readIntReg(SparcISA::NumIntArchRegs + 2);
205 if((regVal & 0xF) != (realRegVal & 0xF))
206 {
207 DPRINTF(ExecRegDelta,
208 "Register ccr should be %#x but is %#x.\n",
209 regVal, realRegVal);
210 }
211#endif
212}
213
214/* namespace Trace */ }
215
216////////////////////////////////////////////////////////////////////////
217//
218// ExeTracer Simulation Object
219//
220Trace::NativeTrace *
221NativeTraceParams::create()
222{
223 return new Trace::NativeTrace(this);
224};
65} /* namespace Trace */