63c63
< * are just the integer, CC, float and vector registers packed
---
> * are just the integer, CC and float registers packed
65,69c65,67
< * CC regs in the range [NumIntRegs, NumIntRegs + NumCCRegs - 1],
< * float regs in the range
< * [NumIntRegs + NumCCRegs, NumFloatRegs + NumIntRegs + NumCCRegs - 1]
< * and vector regs in the range [NumFloatRegs + NumIntRegs + NumCCRegs,
< * NumFloatRegs + NumIntRegs + NumCCRegs + NumVectorRegs - 1]*/
---
> * CC regs in the range [NumIntRegs, NumIntRegs+NumCCRegs-1]
> * and float regs in the range
> * [NumIntRegs+NumCCRegs, NumFloatRegs+NumIntRegs+NumCCRegs-1] */
102c100
< TheISA::NumFloatRegs + TheISA::NumVectorRegs),
---
> TheISA::NumFloatRegs),