| lsq.hh (10581:7c4f1d0a8cff) | lsq.hh (10713:eddb533708cb) |
|---|---|
| 1/* 2 * Copyright (c) 2013-2014 ARM Limited 3 * All rights reserved 4 * 5 * The license below extends only to copyright in the software and shall 6 * not be construed as granting a license to any other intellectual 7 * property including but not limited to intellectual property relating 8 * to a hardware implementation of the functionality of the software --- 87 unchanged lines hidden (view full) --- 96 DcachePort(std::string name, LSQ &lsq_, MinorCPU &cpu) : 97 MinorCPU::MinorCPUPort(name, cpu), lsq(lsq_) 98 { } 99 100 protected: 101 bool recvTimingResp(PacketPtr pkt) 102 { return lsq.recvTimingResp(pkt); } 103 | 1/* 2 * Copyright (c) 2013-2014 ARM Limited 3 * All rights reserved 4 * 5 * The license below extends only to copyright in the software and shall 6 * not be construed as granting a license to any other intellectual 7 * property including but not limited to intellectual property relating 8 * to a hardware implementation of the functionality of the software --- 87 unchanged lines hidden (view full) --- 96 DcachePort(std::string name, LSQ &lsq_, MinorCPU &cpu) : 97 MinorCPU::MinorCPUPort(name, cpu), lsq(lsq_) 98 { } 99 100 protected: 101 bool recvTimingResp(PacketPtr pkt) 102 { return lsq.recvTimingResp(pkt); } 103 |
| 104 void recvRetry() { lsq.recvRetry(); } | 104 void recvReqRetry() { lsq.recvReqRetry(); } |
| 105 106 void recvTimingSnoopReq(PacketPtr pkt) 107 { return lsq.recvTimingSnoopReq(pkt); } 108 }; 109 110 DcachePort dcachePort; 111 112 public: --- 594 unchanged lines hidden (view full) --- 707 unsigned int size, Addr addr, unsigned int flags, uint64_t *res); 708 709 /** Push a predicate failed-representing request into the queues just 710 * to maintain commit order */ 711 void pushFailedRequest(MinorDynInstPtr inst); 712 713 /** Memory interface */ 714 bool recvTimingResp(PacketPtr pkt); | 105 106 void recvTimingSnoopReq(PacketPtr pkt) 107 { return lsq.recvTimingSnoopReq(pkt); } 108 }; 109 110 DcachePort dcachePort; 111 112 public: --- 594 unchanged lines hidden (view full) --- 707 unsigned int size, Addr addr, unsigned int flags, uint64_t *res); 708 709 /** Push a predicate failed-representing request into the queues just 710 * to maintain commit order */ 711 void pushFailedRequest(MinorDynInstPtr inst); 712 713 /** Memory interface */ 714 bool recvTimingResp(PacketPtr pkt); |
| 715 void recvRetry(); | 715 void recvReqRetry(); |
| 716 void recvTimingSnoopReq(PacketPtr pkt); 717 718 /** Return the raw-bindable port */ 719 MinorCPU::MinorCPUPort &getDcachePort() { return dcachePort; } 720 721 void minorTrace() const; 722}; 723 724/** Make a suitable packet for the given request. If the request is a store, 725 * data will be the payload data. If sender_state is NULL, it won't be 726 * pushed into the packet as senderState */ 727PacketPtr makePacketForRequest(Request &request, bool isLoad, 728 Packet::SenderState *sender_state = NULL, PacketDataPtr data = NULL); 729} 730 731#endif /* __CPU_MINOR_NEW_LSQ_HH__ */ | 716 void recvTimingSnoopReq(PacketPtr pkt); 717 718 /** Return the raw-bindable port */ 719 MinorCPU::MinorCPUPort &getDcachePort() { return dcachePort; } 720 721 void minorTrace() const; 722}; 723 724/** Make a suitable packet for the given request. If the request is a store, 725 * data will be the payload data. If sender_state is NULL, it won't be 726 * pushed into the packet as senderState */ 727PacketPtr makePacketForRequest(Request &request, bool isLoad, 728 Packet::SenderState *sender_state = NULL, PacketDataPtr data = NULL); 729} 730 731#endif /* __CPU_MINOR_NEW_LSQ_HH__ */ |