lsq.cc (12749:223c83ed9979) lsq.cc (13449:2f7efa89c58b)
1/*
2 * Copyright (c) 2013-2014,2017 ARM Limited
3 * All rights reserved
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software

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39
40#include "cpu/minor/lsq.hh"
41
42#include <iomanip>
43#include <sstream>
44
45#include "arch/locked_mem.hh"
46#include "arch/mmapped_ipr.hh"
1/*
2 * Copyright (c) 2013-2014,2017 ARM Limited
3 * All rights reserved
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software

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39
40#include "cpu/minor/lsq.hh"
41
42#include <iomanip>
43#include <sstream>
44
45#include "arch/locked_mem.hh"
46#include "arch/mmapped_ipr.hh"
47#include "base/logging.hh"
47#include "cpu/minor/cpu.hh"
48#include "cpu/minor/exec_context.hh"
49#include "cpu/minor/execute.hh"
50#include "cpu/minor/pipeline.hh"
51#include "debug/Activity.hh"
52#include "debug/MinorMem.hh"
53
54namespace Minor

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1116 break;
1117 case LSQRequest::StoreInStoreBuffer:
1118 case LSQRequest::StoreBufferIssuing:
1119 /* Fully or partially issued a request in the store
1120 * buffer */
1121 request->setState(LSQRequest::StoreBufferIssuing);
1122 break;
1123 default:
48#include "cpu/minor/cpu.hh"
49#include "cpu/minor/exec_context.hh"
50#include "cpu/minor/execute.hh"
51#include "cpu/minor/pipeline.hh"
52#include "debug/Activity.hh"
53#include "debug/MinorMem.hh"
54
55namespace Minor

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1117 break;
1118 case LSQRequest::StoreInStoreBuffer:
1119 case LSQRequest::StoreBufferIssuing:
1120 /* Fully or partially issued a request in the store
1121 * buffer */
1122 request->setState(LSQRequest::StoreBufferIssuing);
1123 break;
1124 default:
1124 assert(false);
1125 break;
1125 panic("Unrecognized LSQ request state %d.", request->state);
1126 }
1127
1128 state = MemoryRunning;
1129 } else {
1130 DPRINTF(MinorMem,
1131 "Sending data memory request - needs retry\n");
1132
1133 /* Needs to be resent, wait for that */

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1139 case LSQRequest::RequestIssuing:
1140 request->setState(LSQRequest::RequestNeedsRetry);
1141 break;
1142 case LSQRequest::StoreInStoreBuffer:
1143 case LSQRequest::StoreBufferIssuing:
1144 request->setState(LSQRequest::StoreBufferNeedsRetry);
1145 break;
1146 default:
1126 }
1127
1128 state = MemoryRunning;
1129 } else {
1130 DPRINTF(MinorMem,
1131 "Sending data memory request - needs retry\n");
1132
1133 /* Needs to be resent, wait for that */

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1139 case LSQRequest::RequestIssuing:
1140 request->setState(LSQRequest::RequestNeedsRetry);
1141 break;
1142 case LSQRequest::StoreInStoreBuffer:
1143 case LSQRequest::StoreBufferIssuing:
1144 request->setState(LSQRequest::StoreBufferNeedsRetry);
1145 break;
1146 default:
1147 assert(false);
1148 break;
1147 panic("Unrecognized LSQ request state %d.", request->state);
1149 }
1150 }
1151 }
1152
1153 if (ret)
1154 threadSnoop(request);
1155
1156 return ret;

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1221 } else {
1222 DPRINTF(MinorMem, "Completed transfer for barrier: %s"
1223 " leaving the request as it is also a barrier\n",
1224 *(request->inst));
1225 }
1226 }
1227 break;
1228 default:
1148 }
1149 }
1150 }
1151
1152 if (ret)
1153 threadSnoop(request);
1154
1155 return ret;

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1220 } else {
1221 DPRINTF(MinorMem, "Completed transfer for barrier: %s"
1222 " leaving the request as it is also a barrier\n",
1223 *(request->inst));
1224 }
1225 }
1226 break;
1227 default:
1229 /* Shouldn't be allowed to receive a response from another
1230 * state */
1231 assert(false);
1232 break;
1228 panic("Shouldn't be allowed to receive a response from another state");
1233 }
1234
1235 /* We go to idle even if there are more things in the requests queue
1236 * as it's the job of step to actually step us on to the next
1237 * transaction */
1238
1239 /* Let's try and wake up the processor for the next cycle */
1240 cpu.wakeupOnEvent(Pipeline::ExecuteStageId);

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1255 /* Retry in the requests queue */
1256 retryRequest->setState(LSQRequest::Translated);
1257 break;
1258 case LSQRequest::StoreBufferNeedsRetry:
1259 /* Retry in the store buffer */
1260 retryRequest->setState(LSQRequest::StoreInStoreBuffer);
1261 break;
1262 default:
1229 }
1230
1231 /* We go to idle even if there are more things in the requests queue
1232 * as it's the job of step to actually step us on to the next
1233 * transaction */
1234
1235 /* Let's try and wake up the processor for the next cycle */
1236 cpu.wakeupOnEvent(Pipeline::ExecuteStageId);

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1251 /* Retry in the requests queue */
1252 retryRequest->setState(LSQRequest::Translated);
1253 break;
1254 case LSQRequest::StoreBufferNeedsRetry:
1255 /* Retry in the store buffer */
1256 retryRequest->setState(LSQRequest::StoreInStoreBuffer);
1257 break;
1258 default:
1263 assert(false);
1259 panic("Unrecognized retry request state %d.", retryRequest->state);
1264 }
1265
1266 /* Set state back to MemoryRunning so that the following
1267 * tryToSend can actually send. Note that this won't
1268 * allow another transfer in as tryToSend should
1269 * issue a memory request and either succeed for this
1270 * request or return the LSQ back to MemoryNeedsRetry */
1271 state = MemoryRunning;

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1278 /* In the requests queue */
1279 moveFromRequestsToTransfers(retryRequest);
1280 break;
1281 case LSQRequest::StoreBufferIssuing:
1282 /* In the store buffer */
1283 storeBuffer.countIssuedStore(retryRequest);
1284 break;
1285 default:
1260 }
1261
1262 /* Set state back to MemoryRunning so that the following
1263 * tryToSend can actually send. Note that this won't
1264 * allow another transfer in as tryToSend should
1265 * issue a memory request and either succeed for this
1266 * request or return the LSQ back to MemoryNeedsRetry */
1267 state = MemoryRunning;

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1274 /* In the requests queue */
1275 moveFromRequestsToTransfers(retryRequest);
1276 break;
1277 case LSQRequest::StoreBufferIssuing:
1278 /* In the store buffer */
1279 storeBuffer.countIssuedStore(retryRequest);
1280 break;
1281 default:
1286 assert(false);
1287 break;
1282 panic("Unrecognized retry request state %d.", retryRequest->state);
1288 }
1289
1290 retryRequest = NULL;
1291 }
1292}
1293
1294LSQ::LSQ(std::string name_, std::string dcache_port_name_,
1295 MinorCPU &cpu_, Execute &execute_,

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1284
1285 retryRequest = NULL;
1286 }
1287}
1288
1289LSQ::LSQ(std::string name_, std::string dcache_port_name_,
1290 MinorCPU &cpu_, Execute &execute_,

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