exec_context.hh (11612:985d9b9a68bf) exec_context.hh (11877:5ea85692a53e)
1/*
2 * Copyright (c) 2011-2014 ARM Limited
3 * Copyright (c) 2013 Advanced Micro Devices, Inc.
4 * All rights reserved
5 *
6 * The license below extends only to copyright in the software and shall
7 * not be construed as granting a license to any other intellectual
8 * property including but not limited to intellectual property relating

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236#if THE_ISA == ALPHA_ISA
237 return thread.simPalCheck(palFunc);
238#else
239 return false;
240#endif
241 }
242
243 void
1/*
2 * Copyright (c) 2011-2014 ARM Limited
3 * Copyright (c) 2013 Advanced Micro Devices, Inc.
4 * All rights reserved
5 *
6 * The license below extends only to copyright in the software and shall
7 * not be construed as granting a license to any other intellectual
8 * property including but not limited to intellectual property relating

--- 227 unchanged lines hidden (view full) ---

236#if THE_ISA == ALPHA_ISA
237 return thread.simPalCheck(palFunc);
238#else
239 return false;
240#endif
241 }
242
243 void
244 syscall(int64_t callnum) override
244 syscall(int64_t callnum, Fault *fault) override
245 {
246 if (FullSystem)
247 panic("Syscall emulation isn't available in FS mode.\n");
248
245 {
246 if (FullSystem)
247 panic("Syscall emulation isn't available in FS mode.\n");
248
249 thread.syscall(callnum);
249 thread.syscall(callnum, fault);
250 }
251
252 ThreadContext *tcBase() override { return thread.getTC(); }
253
254 /* @todo, should make stCondFailures persistent somewhere */
255 unsigned int readStCondFailures() const override { return 0; }
256 void setStCondFailures(unsigned int st_cond_failures) override {}
257

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251
252 ThreadContext *tcBase() override { return thread.getTC(); }
253
254 /* @todo, should make stCondFailures persistent somewhere */
255 unsigned int readStCondFailures() const override { return 0; }
256 void setStCondFailures(unsigned int st_cond_failures) override {}
257

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