1/*
2 * Copyright (c) 2011-2014 ARM Limited
3 * Copyright (c) 2013 Advanced Micro Devices, Inc.
4 * All rights reserved
5 *
6 * The license below extends only to copyright in the software and shall
7 * not be construed as granting a license to any other intellectual
8 * property including but not limited to intellectual property relating

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119 execute.getLSQ().pushRequest(inst, false /* store */, data,
120 size, addr, flags, res);
121 return NoFault;
122 }
123
124 IntReg
125 readIntRegOperand(const StaticInst *si, int idx) override
126 {
127 return thread.readIntReg(si->srcRegIdx(idx));
128 }
129
130 TheISA::FloatReg
131 readFloatRegOperand(const StaticInst *si, int idx) override
132 {
133 int reg_idx = si->srcRegIdx(idx) - TheISA::FP_Reg_Base;
134 return thread.readFloatReg(reg_idx);
135 }
136
137 TheISA::FloatRegBits
138 readFloatRegOperandBits(const StaticInst *si, int idx) override
139 {
140 int reg_idx = si->srcRegIdx(idx) - TheISA::FP_Reg_Base;
141 return thread.readFloatRegBits(reg_idx);
142 }
143
144 void
145 setIntRegOperand(const StaticInst *si, int idx, IntReg val) override
146 {
147 thread.setIntReg(si->destRegIdx(idx), val);
148 }
149
150 void
151 setFloatRegOperand(const StaticInst *si, int idx,
152 TheISA::FloatReg val) override
153 {
154 int reg_idx = si->destRegIdx(idx) - TheISA::FP_Reg_Base;
155 thread.setFloatReg(reg_idx, val);
156 }
157
158 void
159 setFloatRegOperandBits(const StaticInst *si, int idx,
160 TheISA::FloatRegBits val) override
161 {
162 int reg_idx = si->destRegIdx(idx) - TheISA::FP_Reg_Base;
163 thread.setFloatRegBits(reg_idx, val);
164 }
165
166 bool
167 readPredicate() override
168 {
169 return thread.readPredicate();
170 }
171

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203 setMiscReg(int misc_reg, const TheISA::MiscReg &val) override
204 {
205 thread.setMiscReg(misc_reg, val);
206 }
207
208 TheISA::MiscReg
209 readMiscRegOperand(const StaticInst *si, int idx) override
210 {
211 int reg_idx = si->srcRegIdx(idx) - TheISA::Misc_Reg_Base;
212 return thread.readMiscReg(reg_idx);
213 }
214
215 void
216 setMiscRegOperand(const StaticInst *si, int idx,
217 const TheISA::MiscReg &val) override
218 {
219 int reg_idx = si->destRegIdx(idx) - TheISA::Misc_Reg_Base;
220 return thread.setMiscReg(reg_idx, val);
221 }
222
223 Fault
224 hwrei() override
225 {
226#if THE_ISA == ALPHA_ISA
227 return thread.hwrei();
228#else

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264 {
265 thread.getITBPtr()->demapPage(vaddr, asn);
266 thread.getDTBPtr()->demapPage(vaddr, asn);
267 }
268
269 TheISA::CCReg
270 readCCRegOperand(const StaticInst *si, int idx) override
271 {
272 int reg_idx = si->srcRegIdx(idx) - TheISA::CC_Reg_Base;
273 return thread.readCCReg(reg_idx);
274 }
275
276 void
277 setCCRegOperand(const StaticInst *si, int idx, TheISA::CCReg val) override
278 {
279 int reg_idx = si->destRegIdx(idx) - TheISA::CC_Reg_Base;
280 thread.setCCReg(reg_idx, val);
281 }
282
283 void
284 demapInstPage(Addr vaddr, uint64_t asn)
285 {
286 thread.getITBPtr()->demapPage(vaddr, asn);
287 }
288

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303 /* POWER: Effective address storage */
304 Addr getEA() const override
305 {
306 return inst->ea;
307 }
308
309 /* MIPS: other thread register reading/writing */
310 uint64_t
311 readRegOtherThread(int idx, ThreadID tid = InvalidThreadID)
312 {
313 SimpleThread *other_thread = (tid == InvalidThreadID
314 ? &thread : cpu.threads[tid]);
315
316 if (idx < TheISA::FP_Reg_Base) { /* Integer */
317 return other_thread->readIntReg(idx);
318 } else if (idx < TheISA::Misc_Reg_Base) { /* Float */
319 return other_thread->readFloatRegBits(idx
320 - TheISA::FP_Reg_Base);
321 } else { /* Misc */
322 return other_thread->readMiscReg(idx
323 - TheISA::Misc_Reg_Base);
324 }
325 }
326
327 void
328 setRegOtherThread(int idx, const TheISA::MiscReg &val,
329 ThreadID tid = InvalidThreadID)
330 {
331 SimpleThread *other_thread = (tid == InvalidThreadID
332 ? &thread : cpu.threads[tid]);
333
334 if (idx < TheISA::FP_Reg_Base) { /* Integer */
335 return other_thread->setIntReg(idx, val);
336 } else if (idx < TheISA::Misc_Reg_Base) { /* Float */
337 return other_thread->setFloatRegBits(idx
338 - TheISA::FP_Reg_Base, val);
339 } else { /* Misc */
340 return other_thread->setMiscReg(idx
341 - TheISA::Misc_Reg_Base, val);
342 }
343 }
344
345 public:
346 // monitor/mwait funtions
347 void armMonitor(Addr address) override
348 { getCpuPtr()->armMonitor(inst->id.threadId, address); }
349

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