1/*
2 * Copyright (c) 2012-2014 ARM Limited
3 * All rights reserved
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software

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73 * This pipeline is carried in the MinorCPU::pipeline object.
74 * The exec_context interface is not carried by MinorCPU but by
75 * Minor::ExecContext objects
76 * created by Minor::Execute.
77 */
78class MinorCPU : public BaseCPU
79{
80 protected:
81 /** pipeline is a container for the clockable pipeline stage objects.
82 * Elements of pipeline call TheISA to implement the model. */
83 Minor::Pipeline *pipeline;
84
85 public:
86 /** Activity recording for pipeline. This belongs to Pipeline but
87 * stages will access it through the CPU as the MinorCPU object
88 * actually mediates idling behaviour */

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162 void signalDrainDone();
163 void memWriteback();
164
165 /** Switching interface from BaseCPU */
166 void switchOut();
167 void takeOverFrom(BaseCPU *old_cpu);
168
169 /** Thread activation interface from BaseCPU. */
170 void activateContext(ThreadID thread_id);
171 void suspendContext(ThreadID thread_id);
172
173 /** Interface for stages to signal that they have become active after
174 * a callback or eventq event where the pipeline itself may have
175 * already been idled. The stage argument should be from the
176 * enumeration Pipeline::StageId */
177 void wakeupOnEvent(unsigned int stage_id);
178};
179
180#endif /* __CPU_MINOR_CPU_HH__ */