x86_cpu.cc (11150:a8a64cca231b) | x86_cpu.cc (11321:02e930db812d) |
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1/* 2 * Copyright (c) 2013 Andreas Sandberg 3 * All rights reserved 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions are 7 * met: redistributions of source code must retain the above copyright 8 * notice, this list of conditions and the following disclaimer; --- 104 unchanged lines hidden (view full) --- 113 APPLY_IREG(r8, INTREG_R8); \ 114 APPLY_IREG(r9, INTREG_R9); \ 115 APPLY_IREG(r10, INTREG_R10); \ 116 APPLY_IREG(r11, INTREG_R11); \ 117 APPLY_IREG(r12, INTREG_R12); \ 118 APPLY_IREG(r13, INTREG_R13); \ 119 APPLY_IREG(r14, INTREG_R14); \ 120 APPLY_IREG(r15, INTREG_R15); \ | 1/* 2 * Copyright (c) 2013 Andreas Sandberg 3 * All rights reserved 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions are 7 * met: redistributions of source code must retain the above copyright 8 * notice, this list of conditions and the following disclaimer; --- 104 unchanged lines hidden (view full) --- 113 APPLY_IREG(r8, INTREG_R8); \ 114 APPLY_IREG(r9, INTREG_R9); \ 115 APPLY_IREG(r10, INTREG_R10); \ 116 APPLY_IREG(r11, INTREG_R11); \ 117 APPLY_IREG(r12, INTREG_R12); \ 118 APPLY_IREG(r13, INTREG_R13); \ 119 APPLY_IREG(r14, INTREG_R14); \ 120 APPLY_IREG(r15, INTREG_R15); \ |
121 } while(0) | 121 } while (0) |
122 123#define FOREACH_SREG() \ 124 do { \ 125 APPLY_SREG(cr0, MISCREG_CR0); \ 126 APPLY_SREG(cr2, MISCREG_CR2); \ 127 APPLY_SREG(cr3, MISCREG_CR3); \ 128 APPLY_SREG(cr4, MISCREG_CR4); \ 129 APPLY_SREG(cr8, MISCREG_CR8); \ 130 APPLY_SREG(efer, MISCREG_EFER); \ 131 APPLY_SREG(apic_base, MISCREG_APIC_BASE); \ | 122 123#define FOREACH_SREG() \ 124 do { \ 125 APPLY_SREG(cr0, MISCREG_CR0); \ 126 APPLY_SREG(cr2, MISCREG_CR2); \ 127 APPLY_SREG(cr3, MISCREG_CR3); \ 128 APPLY_SREG(cr4, MISCREG_CR4); \ 129 APPLY_SREG(cr8, MISCREG_CR8); \ 130 APPLY_SREG(efer, MISCREG_EFER); \ 131 APPLY_SREG(apic_base, MISCREG_APIC_BASE); \ |
132 } while(0) | 132 } while (0) |
133 134#define FOREACH_DREG() \ 135 do { \ 136 APPLY_DREG(db[0], MISCREG_DR0); \ 137 APPLY_DREG(db[1], MISCREG_DR1); \ 138 APPLY_DREG(db[2], MISCREG_DR2); \ 139 APPLY_DREG(db[3], MISCREG_DR3); \ 140 APPLY_DREG(dr6, MISCREG_DR6); \ 141 APPLY_DREG(dr7, MISCREG_DR7); \ | 133 134#define FOREACH_DREG() \ 135 do { \ 136 APPLY_DREG(db[0], MISCREG_DR0); \ 137 APPLY_DREG(db[1], MISCREG_DR1); \ 138 APPLY_DREG(db[2], MISCREG_DR2); \ 139 APPLY_DREG(db[3], MISCREG_DR3); \ 140 APPLY_DREG(dr6, MISCREG_DR6); \ 141 APPLY_DREG(dr7, MISCREG_DR7); \ |
142 } while(0) | 142 } while (0) |
143 144#define FOREACH_SEGMENT() \ 145 do { \ 146 APPLY_SEGMENT(cs, MISCREG_CS - MISCREG_SEG_SEL_BASE); \ 147 APPLY_SEGMENT(ds, MISCREG_DS - MISCREG_SEG_SEL_BASE); \ 148 APPLY_SEGMENT(es, MISCREG_ES - MISCREG_SEG_SEL_BASE); \ 149 APPLY_SEGMENT(fs, MISCREG_FS - MISCREG_SEG_SEL_BASE); \ 150 APPLY_SEGMENT(gs, MISCREG_GS - MISCREG_SEG_SEL_BASE); \ 151 APPLY_SEGMENT(ss, MISCREG_SS - MISCREG_SEG_SEL_BASE); \ 152 APPLY_SEGMENT(tr, MISCREG_TR - MISCREG_SEG_SEL_BASE); \ 153 APPLY_SEGMENT(ldt, MISCREG_TSL - MISCREG_SEG_SEL_BASE); \ | 143 144#define FOREACH_SEGMENT() \ 145 do { \ 146 APPLY_SEGMENT(cs, MISCREG_CS - MISCREG_SEG_SEL_BASE); \ 147 APPLY_SEGMENT(ds, MISCREG_DS - MISCREG_SEG_SEL_BASE); \ 148 APPLY_SEGMENT(es, MISCREG_ES - MISCREG_SEG_SEL_BASE); \ 149 APPLY_SEGMENT(fs, MISCREG_FS - MISCREG_SEG_SEL_BASE); \ 150 APPLY_SEGMENT(gs, MISCREG_GS - MISCREG_SEG_SEL_BASE); \ 151 APPLY_SEGMENT(ss, MISCREG_SS - MISCREG_SEG_SEL_BASE); \ 152 APPLY_SEGMENT(tr, MISCREG_TR - MISCREG_SEG_SEL_BASE); \ 153 APPLY_SEGMENT(ldt, MISCREG_TSL - MISCREG_SEG_SEL_BASE); \ |
154 } while(0) | 154 } while (0) |
155 156#define FOREACH_DTABLE() \ 157 do { \ 158 APPLY_DTABLE(gdt, MISCREG_TSG - MISCREG_SEG_SEL_BASE); \ 159 APPLY_DTABLE(idt, MISCREG_IDTR - MISCREG_SEG_SEL_BASE); \ | 155 156#define FOREACH_DTABLE() \ 157 do { \ 158 APPLY_DTABLE(gdt, MISCREG_TSG - MISCREG_SEG_SEL_BASE); \ 159 APPLY_DTABLE(idt, MISCREG_IDTR - MISCREG_SEG_SEL_BASE); \ |
160 } while(0) | 160 } while (0) |
161 162template<typename STRUCT, typename ENTRY> 163static STRUCT *newVarStruct(size_t entries) 164{ 165 return (STRUCT *)operator new(sizeof(STRUCT) + entries * sizeof(ENTRY)); 166} 167 168static void --- 1460 unchanged lines hidden --- | 161 162template<typename STRUCT, typename ENTRY> 163static STRUCT *newVarStruct(size_t entries) 164{ 165 return (STRUCT *)operator new(sizeof(STRUCT) + entries * sizeof(ENTRY)); 166} 167 168static void --- 1460 unchanged lines hidden --- |