1# Copyright (c) 2012 ARM Limited
2# All rights reserved.
3#
4# The license below extends only to copyright in the software and shall
5# not be construed as granting a license to any other intellectual
6# property including but not limited to intellectual property relating
7# to a hardware implementation of the functionality of the software
8# licensed hereunder. You may use the software subject to the license

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30# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
31# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
32# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
33# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
34# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
35#
36# Authors: Andreas Sandberg
37
38from m5.SimObject import *
39from m5.params import *
40from m5.proxy import *
41
42from BaseCPU import BaseCPU
43from KvmVM import KvmVM
44
45class BaseKvmCPU(BaseCPU):
46 type = 'BaseKvmCPU'
47 cxx_header = "cpu/kvm/base.hh"
48 abstract = True
49
50 @cxxMethod
51 def dump(self):
52 """Dump the internal state of KVM to standard out."""
53 pass
54
55 @classmethod
56 def memory_mode(cls):
57 return 'atomic_noncaching'
58
59 @classmethod
60 def require_caches(cls):
61 return False

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