intr_control.cc (2680:246e7104f744) | intr_control.cc (4103:785279436bdd) |
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1/* 2 * Copyright (c) 2002-2005 The Regents of The University of Michigan 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions are 7 * met: redistributions of source code must retain the above copyright 8 * notice, this list of conditions and the following disclaimer; --- 26 unchanged lines hidden (view full) --- 35#include "cpu/base.hh" 36#include "cpu/thread_context.hh" 37#include "cpu/intr_control.hh" 38#include "sim/builder.hh" 39#include "sim/sim_object.hh" 40 41using namespace std; 42 | 1/* 2 * Copyright (c) 2002-2005 The Regents of The University of Michigan 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions are 7 * met: redistributions of source code must retain the above copyright 8 * notice, this list of conditions and the following disclaimer; --- 26 unchanged lines hidden (view full) --- 35#include "cpu/base.hh" 36#include "cpu/thread_context.hh" 37#include "cpu/intr_control.hh" 38#include "sim/builder.hh" 39#include "sim/sim_object.hh" 40 41using namespace std; 42 |
43IntrControl::IntrControl(const string &name, BaseCPU *c) 44 : SimObject(name), cpu(c) | 43IntrControl::IntrControl(const string &name, System *s) 44 : SimObject(name), sys(s) |
45{} 46 | 45{} 46 |
47/* @todo 48 *Fix the cpu sim object parameter to be a system pointer 49 *instead, to avoid some extra dereferencing 50 */ | |
51void 52IntrControl::post(int int_num, int index) 53{ | 47void 48IntrControl::post(int int_num, int index) 49{ |
54 std::vector<ThreadContext *> &tcvec = cpu->system->threadContexts; | 50 std::vector<ThreadContext *> &tcvec = sys->threadContexts; |
55 BaseCPU *temp = tcvec[0]->getCpuPtr(); 56 temp->post_interrupt(int_num, index); 57} 58 59void 60IntrControl::post(int cpu_id, int int_num, int index) 61{ | 51 BaseCPU *temp = tcvec[0]->getCpuPtr(); 52 temp->post_interrupt(int_num, index); 53} 54 55void 56IntrControl::post(int cpu_id, int int_num, int index) 57{ |
62 std::vector<ThreadContext *> &tcvec = cpu->system->threadContexts; | 58 std::vector<ThreadContext *> &tcvec = sys->threadContexts; |
63 BaseCPU *temp = tcvec[cpu_id]->getCpuPtr(); 64 temp->post_interrupt(int_num, index); 65} 66 67void 68IntrControl::clear(int int_num, int index) 69{ | 59 BaseCPU *temp = tcvec[cpu_id]->getCpuPtr(); 60 temp->post_interrupt(int_num, index); 61} 62 63void 64IntrControl::clear(int int_num, int index) 65{ |
70 std::vector<ThreadContext *> &tcvec = cpu->system->threadContexts; | 66 std::vector<ThreadContext *> &tcvec = sys->threadContexts; |
71 BaseCPU *temp = tcvec[0]->getCpuPtr(); 72 temp->clear_interrupt(int_num, index); 73} 74 75void 76IntrControl::clear(int cpu_id, int int_num, int index) 77{ | 67 BaseCPU *temp = tcvec[0]->getCpuPtr(); 68 temp->clear_interrupt(int_num, index); 69} 70 71void 72IntrControl::clear(int cpu_id, int int_num, int index) 73{ |
78 std::vector<ThreadContext *> &tcvec = cpu->system->threadContexts; | 74 std::vector<ThreadContext *> &tcvec = sys->threadContexts; |
79 BaseCPU *temp = tcvec[cpu_id]->getCpuPtr(); 80 temp->clear_interrupt(int_num, index); 81} 82 83BEGIN_DECLARE_SIM_OBJECT_PARAMS(IntrControl) 84 | 75 BaseCPU *temp = tcvec[cpu_id]->getCpuPtr(); 76 temp->clear_interrupt(int_num, index); 77} 78 79BEGIN_DECLARE_SIM_OBJECT_PARAMS(IntrControl) 80 |
85 SimObjectParam<BaseCPU *> cpu; | 81 SimObjectParam<System *> sys; |
86 87END_DECLARE_SIM_OBJECT_PARAMS(IntrControl) 88 89BEGIN_INIT_SIM_OBJECT_PARAMS(IntrControl) 90 | 82 83END_DECLARE_SIM_OBJECT_PARAMS(IntrControl) 84 85BEGIN_INIT_SIM_OBJECT_PARAMS(IntrControl) 86 |
91 INIT_PARAM(cpu, "the cpu") | 87 INIT_PARAM(sys, "the system we are part of") |
92 93END_INIT_SIM_OBJECT_PARAMS(IntrControl) 94 95CREATE_SIM_OBJECT(IntrControl) 96{ | 88 89END_INIT_SIM_OBJECT_PARAMS(IntrControl) 90 91CREATE_SIM_OBJECT(IntrControl) 92{ |
97 return new IntrControl(getInstanceName(), cpu); | 93 return new IntrControl(getInstanceName(), sys); |
98} 99 100REGISTER_SIM_OBJECT("IntrControl", IntrControl) | 94} 95 96REGISTER_SIM_OBJECT("IntrControl", IntrControl) |