1/* 2 * Copyright (c) 2002-2005 The Regents of The University of Michigan 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions are 7 * met: redistributions of source code must retain the above copyright 8 * notice, this list of conditions and the following disclaimer; --- 36 unchanged lines hidden (view full) --- 45{} 46 47void 48IntrControl::post(int cpu_id, int int_num, int index) 49{ 50 DPRINTF(IntrControl, "post %d:%d (cpu %d)\n", int_num, index, cpu_id); 51 std::vector<ThreadContext *> &tcvec = sys->threadContexts; 52 BaseCPU *cpu = tcvec[cpu_id]->getCpuPtr(); |
53 cpu->postInterrupt(int_num, index); |
54} 55 56void 57IntrControl::clear(int cpu_id, int int_num, int index) 58{ 59 DPRINTF(IntrControl, "clear %d:%d (cpu %d)\n", int_num, index, cpu_id); 60 std::vector<ThreadContext *> &tcvec = sys->threadContexts; 61 BaseCPU *cpu = tcvec[cpu_id]->getCpuPtr(); |
62 cpu->clearInterrupt(int_num, index); |
63} 64 65IntrControl * 66IntrControlParams::create() 67{ 68 return new IntrControl(this); 69} |