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< * Copyright (c) 2016 ARM Limited
---
> * Copyright (c) 2016-2017 ARM Limited
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> using VecPredRegContainer = TheISA::VecPredRegContainer;
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> VecPredRegContainer pred;
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> VecPredReg,
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> /** Predicate result. */
> explicit InstResult(const VecPredRegContainer& v, const ResultType& t)
> : type(t) { result.pred = v; }
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> case ResultType::VecPredReg:
> result.pred = that.result.pred;
> break;
>
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> case ResultType::VecPredReg:
> return result.pred == that.result.pred;
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> /** Is this a predicate result?. */
> bool isPred() const { return type == ResultType::VecPredReg; }
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>
> const VecPredRegContainer&
> asPred() const
> {
> panic_if(!isPred(), "Converting scalar (or invalid) to predicate!!");
> return result.pred;
> }
>