exetrace.hh (3506:99f86646ba5c) exetrace.hh (3918:1f9a98d198e8)
1/*
2 * Copyright (c) 2001-2005 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;

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27 *
28 * Authors: Steve Reinhardt
29 * Nathan Binkert
30 */
31
32#ifndef __EXETRACE_HH__
33#define __EXETRACE_HH__
34
1/*
2 * Copyright (c) 2001-2005 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;

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27 *
28 * Authors: Steve Reinhardt
29 * Nathan Binkert
30 */
31
32#ifndef __EXETRACE_HH__
33#define __EXETRACE_HH__
34
35#include <cstring>
35#include <fstream>
36#include <vector>
37
38#include "sim/host.hh"
39#include "cpu/inst_seq.hh" // for InstSeqNum
40#include "base/trace.hh"
41#include "cpu/thread_context.hh"
42#include "cpu/static_inst.hh"

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164
165
166inline void
167InstRecord::setRegs(const IntRegFile &regs)
168{
169 if (!iregs)
170 iregs = new iRegFile;
171
36#include <fstream>
37#include <vector>
38
39#include "sim/host.hh"
40#include "cpu/inst_seq.hh" // for InstSeqNum
41#include "base/trace.hh"
42#include "cpu/thread_context.hh"
43#include "cpu/static_inst.hh"

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165
166
167inline void
168InstRecord::setRegs(const IntRegFile &regs)
169{
170 if (!iregs)
171 iregs = new iRegFile;
172
172 memcpy(&iregs->regs, ®s, sizeof(IntRegFile));
173 std::memcpy(&iregs->regs, &regs, sizeof(IntRegFile));
173 regs_valid = true;
174}
175
176inline
177InstRecord *
178getInstRecord(Tick cycle, ThreadContext *tc,
179 const StaticInstPtr staticInst,
180 Addr pc)

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175}
176
177inline
178InstRecord *
179getInstRecord(Tick cycle, ThreadContext *tc,
180 const StaticInstPtr staticInst,
181 Addr pc)

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