exetrace.cc (6658:f4de76601762) exetrace.cc (7349:8b4564729c81)
1/*
2 * Copyright (c) 2001-2005 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;

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28 * Authors: Steve Reinhardt
29 * Lisa Hsu
30 * Nathan Binkert
31 * Steve Raasch
32 */
33
34#include <iomanip>
35
1/*
2 * Copyright (c) 2001-2005 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;

--- 19 unchanged lines hidden (view full) ---

28 * Authors: Steve Reinhardt
29 * Lisa Hsu
30 * Nathan Binkert
31 * Steve Raasch
32 */
33
34#include <iomanip>
35
36#include "arch/isa_traits.hh"
36#include "base/loader/symtab.hh"
37#include "cpu/base.hh"
38#include "cpu/exetrace.hh"
39#include "cpu/static_inst.hh"
40#include "cpu/thread_context.hh"
41#include "config/the_isa.hh"
42#include "enums/OpClass.hh"
43

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65 if (IsOn(ExecSpeculative))
66 outs << (misspeculating ? "-" : "+") << " ";
67
68 if (IsOn(ExecThread))
69 outs << "T" << thread->threadId() << " : ";
70
71 std::string sym_str;
72 Addr sym_addr;
37#include "base/loader/symtab.hh"
38#include "cpu/base.hh"
39#include "cpu/exetrace.hh"
40#include "cpu/static_inst.hh"
41#include "cpu/thread_context.hh"
42#include "config/the_isa.hh"
43#include "enums/OpClass.hh"
44

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66 if (IsOn(ExecSpeculative))
67 outs << (misspeculating ? "-" : "+") << " ";
68
69 if (IsOn(ExecThread))
70 outs << "T" << thread->threadId() << " : ";
71
72 std::string sym_str;
73 Addr sym_addr;
74 Addr cur_pc = PC;
75#if THE_ISA == ARM_ISA
76 cur_pc &= ~PcModeMask;
77#endif
73 if (debugSymbolTable
74 && IsOn(ExecSymbol)
75#if FULL_SYSTEM
76 && !inUserMode(thread)
77#endif
78 if (debugSymbolTable
79 && IsOn(ExecSymbol)
80#if FULL_SYSTEM
81 && !inUserMode(thread)
82#endif
78 && debugSymbolTable->findNearestSymbol(PC, sym_str, sym_addr)) {
79 if (PC != sym_addr)
80 sym_str += csprintf("+%d", PC - sym_addr);
83 && debugSymbolTable->findNearestSymbol(cur_pc, sym_str, sym_addr)) {
84 if (cur_pc != sym_addr)
85 sym_str += csprintf("+%d",cur_pc - sym_addr);
81 outs << "@" << sym_str;
82 }
83 else {
86 outs << "@" << sym_str;
87 }
88 else {
84 outs << "0x" << hex << PC;
89 outs << "0x" << hex << cur_pc;
85 }
86
87 if (inst->isMicroop()) {
88 outs << "." << setw(2) << dec << upc;
89 } else {
90 outs << " ";
91 }
92
93 outs << " : ";
94
95 //
96 // Print decoded instruction
97 //
98
99 outs << setw(26) << left;
90 }
91
92 if (inst->isMicroop()) {
93 outs << "." << setw(2) << dec << upc;
94 } else {
95 outs << " ";
96 }
97
98 outs << " : ";
99
100 //
101 // Print decoded instruction
102 //
103
104 outs << setw(26) << left;
100 outs << inst->disassemble(PC, debugSymbolTable);
105 outs << inst->disassemble(cur_pc, debugSymbolTable);
101
102 if (ran) {
103 outs << " : ";
104
105 if (IsOn(ExecOpClass)) {
106 outs << Enums::OpClassStrings[inst->opClass()] << " : ";
107 }
108

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107 if (ran) {
108 outs << " : ";
109
110 if (IsOn(ExecOpClass)) {
111 outs << Enums::OpClassStrings[inst->opClass()] << " : ";
112 }
113

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