exetrace.cc (3975:10fa2125f19e) exetrace.cc (3980:9bcb2a2e9bb8)
1/*
2 * Copyright (c) 2001-2005 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;

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290#if THE_ISA == SPARC_ISA && FULL_SYSTEM
291 // Compare
292 if (flags[LEGION_LOCKSTEP])
293 {
294 bool compared = false;
295 bool diffPC = false;
296 bool diffCC = false;
297 bool diffInst = false;
1/*
2 * Copyright (c) 2001-2005 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;

--- 281 unchanged lines hidden (view full) ---

290#if THE_ISA == SPARC_ISA && FULL_SYSTEM
291 // Compare
292 if (flags[LEGION_LOCKSTEP])
293 {
294 bool compared = false;
295 bool diffPC = false;
296 bool diffCC = false;
297 bool diffInst = false;
298 bool diffRegs = false;
298 bool diffIntRegs = false;
299 bool diffFpRegs = false;
299 bool diffTpc = false;
300 bool diffTnpc = false;
301 bool diffTstate = false;
302 bool diffTt = false;
303 bool diffTba = false;
304 bool diffHpstate = false;
305 bool diffHtstate = false;
306 bool diffHtba = false;

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354 diffCC = true;
355
356 if (shared_data->instruction !=
357 (SparcISA::MachInst)staticInst->machInst) {
358 diffInst = true;
359 }
360 for (int i = 0; i < TheISA::NumIntArchRegs; i++) {
361 if (thread->readIntReg(i) != shared_data->intregs[i]) {
300 bool diffTpc = false;
301 bool diffTnpc = false;
302 bool diffTstate = false;
303 bool diffTt = false;
304 bool diffTba = false;
305 bool diffHpstate = false;
306 bool diffHtstate = false;
307 bool diffHtba = false;

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355 diffCC = true;
356
357 if (shared_data->instruction !=
358 (SparcISA::MachInst)staticInst->machInst) {
359 diffInst = true;
360 }
361 for (int i = 0; i < TheISA::NumIntArchRegs; i++) {
362 if (thread->readIntReg(i) != shared_data->intregs[i]) {
362 diffRegs = true;
363 diffIntRegs = true;
363 }
364 }
364 }
365 }
365 uint64_t oldTl = thread->readMiscReg(MISCREG_TL);
366 for (int i = 0; i < TheISA::NumFloatRegs/2; i++) {
367 if (thread->readFloatRegBits(i,FloatRegFile::DoubleWidth) != shared_data->fpregs[i]) {
368 diffFpRegs = true;
369 }
370 }
371 uint64_t oldTl = thread->readMiscReg(MISCREG_TL);
366 if (oldTl != shared_data->tl)
367 diffTl = true;
368 for (int i = 1; i <= MaxTL; i++) {
369 thread->setMiscReg(MISCREG_TL, i);
370 if (thread->readMiscReg(MISCREG_TPC) !=
371 shared_data->tpc[i-1])
372 diffTpc = true;
373 if (thread->readMiscReg(MISCREG_TNPC) !=

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435
436 for (int i = 0; i < 64; i++) {
437 if (shared_data->itb[i] != thread->getITBPtr()->TteRead(i))
438 diffTlb = true;
439 if (shared_data->dtb[i] != thread->getDTBPtr()->TteRead(i))
440 diffTlb = true;
441 }
442
372 if (oldTl != shared_data->tl)
373 diffTl = true;
374 for (int i = 1; i <= MaxTL; i++) {
375 thread->setMiscReg(MISCREG_TL, i);
376 if (thread->readMiscReg(MISCREG_TPC) !=
377 shared_data->tpc[i-1])
378 diffTpc = true;
379 if (thread->readMiscReg(MISCREG_TNPC) !=

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441
442 for (int i = 0; i < 64; i++) {
443 if (shared_data->itb[i] != thread->getITBPtr()->TteRead(i))
444 diffTlb = true;
445 if (shared_data->dtb[i] != thread->getDTBPtr()->TteRead(i))
446 diffTlb = true;
447 }
448
443 if ((diffPC || diffCC || diffInst || diffRegs || diffTpc ||
444 diffTnpc || diffTstate || diffTt || diffHpstate ||
445 diffHtstate || diffHtba || diffPstate || diffY ||
446 diffCcr || diffTl || diffGl || diffAsi || diffPil ||
447 diffCwp || diffCansave || diffCanrestore ||
448 diffOtherwin || diffCleanwin || diffTlb)
449 if ((diffPC || diffCC || diffInst || diffIntRegs ||
450 diffFpRegs || diffTpc || diffTnpc || diffTstate ||
451 diffTt || diffHpstate || diffHtstate || diffHtba ||
452 diffPstate || diffY || diffCcr || diffTl || diffGl ||
453 diffAsi || diffPil || diffCwp || diffCansave ||
454 diffCanrestore || diffOtherwin || diffCleanwin || diffTlb)
449 && !((staticInst->machInst & 0xC1F80000) == 0x81D00000)
450 && !(((staticInst->machInst & 0xC0000000) == 0xC0000000)
451 && shared_data->tl == thread->readMiscReg(MISCREG_TL) + 1)
452 ) {
453
454 outs << "Differences found between M5 and Legion:";
455 if (diffPC)
456 outs << " [PC]";
457 if (diffCC)
458 outs << " [CC]";
459 if (diffInst)
460 outs << " [Instruction]";
455 && !((staticInst->machInst & 0xC1F80000) == 0x81D00000)
456 && !(((staticInst->machInst & 0xC0000000) == 0xC0000000)
457 && shared_data->tl == thread->readMiscReg(MISCREG_TL) + 1)
458 ) {
459
460 outs << "Differences found between M5 and Legion:";
461 if (diffPC)
462 outs << " [PC]";
463 if (diffCC)
464 outs << " [CC]";
465 if (diffInst)
466 outs << " [Instruction]";
461 if (diffRegs)
467 if (diffIntRegs)
462 outs << " [IntRegs]";
468 outs << " [IntRegs]";
469 if (diffFpRegs)
470 outs << " [FpRegs]";
463 if (diffTpc)
464 outs << " [Tpc]";
465 if (diffTnpc)
466 outs << " [Tnpc]";
467 if (diffTstate)
468 outs << " [Tstate]";
469 if (diffTt)
470 outs << " [Tt]";

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603 thread->readMiscReg(MISCREG_HTSTATE),
604 shared_data->htstate[i-1]);
605 }
606 thread->setMiscReg(MISCREG_TL, oldTl);
607 outs << endl;
608
609 printSectionHeader(outs, "General Purpose Registers");
610 static const char * regtypes[4] = {"%g", "%o", "%l", "%i"};
471 if (diffTpc)
472 outs << " [Tpc]";
473 if (diffTnpc)
474 outs << " [Tnpc]";
475 if (diffTstate)
476 outs << " [Tstate]";
477 if (diffTt)
478 outs << " [Tt]";

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611 thread->readMiscReg(MISCREG_HTSTATE),
612 shared_data->htstate[i-1]);
613 }
614 thread->setMiscReg(MISCREG_TL, oldTl);
615 outs << endl;
616
617 printSectionHeader(outs, "General Purpose Registers");
618 static const char * regtypes[4] = {"%g", "%o", "%l", "%i"};
611 for(int y = 0; y < 4; y++)
612 {
613 for(int x = 0; x < 8; x++)
614 {
619 for(int y = 0; y < 4; y++) {
620 for(int x = 0; x < 8; x++) {
615 char label[8];
616 sprintf(label, "%s%d", regtypes[y], x);
617 printRegPair(outs, label,
618 thread->readIntReg(y*8+x),
619 shared_data->intregs[y*8+x]);
621 char label[8];
622 sprintf(label, "%s%d", regtypes[y], x);
623 printRegPair(outs, label,
624 thread->readIntReg(y*8+x),
625 shared_data->intregs[y*8+x]);
620 /*outs << regtypes[y] << x << " " ;
621 outs << "0x" << hex << setw(16)
622 << thread->readIntReg(y*8+x);
623 if (thread->readIntReg(y*8 + x)
624 != shared_data->intregs[y*8+x])
625 outs << " X ";
626 else
627 outs << " | ";
628 outs << "0x" << setw(16) << hex
629 << shared_data->intregs[y*8+x]
630 << endl;*/
631 }
632 }
626 }
627 }
628 if (diffFpRegs) {
629 for (int x = 0; x < 32; x++) {
630 char label[8];
631 sprintf(label, "%%f%d", x);
632 printRegPair(outs, label,
633 thread->readFloatRegBits(x,FloatRegFile::DoubleWidth),
634 shared_data->fpregs[x]);
635 }
636 }
633 if (diffTlb) {
634 printColumnLabels(outs);
635 char label[8];
636 for (int x = 0; x < 64; x++) {
637 if (shared_data->itb[x] != ULL(0xFFFFFFFFFFFFFFFF) ||
638 thread->getITBPtr()->TteRead(x) != ULL(0xFFFFFFFFFFFFFFFF)) {
639 sprintf(label, "I-TLB:%02d", x);
640 printRegPair(outs, label, thread->getITBPtr()->TteRead(x),

--- 137 unchanged lines hidden --- 		637 if (diffTlb) {
638 printColumnLabels(outs);
639 char label[8];
640 for (int x = 0; x < 64; x++) {
641 if (shared_data->itb[x] != ULL(0xFFFFFFFFFFFFFFFF) ||
642 thread->getITBPtr()->TteRead(x) != ULL(0xFFFFFFFFFFFFFFFF)) {
643 sprintf(label, "I-TLB:%02d", x);
644 printRegPair(outs, label, thread->getITBPtr()->TteRead(x),

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