exetrace.cc (3945:255fad06ea71) exetrace.cc (3949:b6664282d899)
1/*
2 * Copyright (c) 2001-2005 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;

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54#include "arch/isa_specific.hh"
55#include "cpu/m5legion_interface.h"
56
57using namespace std;
58using namespace TheISA;
59
60#if THE_ISA == SPARC_ISA && FULL_SYSTEM
61static int diffcount = 0;
1/*
2 * Copyright (c) 2001-2005 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;

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54#include "arch/isa_specific.hh"
55#include "cpu/m5legion_interface.h"
56
57using namespace std;
58using namespace TheISA;
59
60#if THE_ISA == SPARC_ISA && FULL_SYSTEM
61static int diffcount = 0;
62static bool wasMicro = false;
63#endif
64
65namespace Trace {
66SharedData *shared_data = NULL;
67}
68
69////////////////////////////////////////////////////////////////////////
70//

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120 ccprintf(os, "====================================================================\n");
121}
122
123#endif
124
125void
126Trace::InstRecord::dump(ostream &outs)
127{
62#endif
63
64namespace Trace {
65SharedData *shared_data = NULL;
66}
67
68////////////////////////////////////////////////////////////////////////
69//

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119 ccprintf(os, "====================================================================\n");
120}
121
122#endif
123
124void
125Trace::InstRecord::dump(ostream &outs)
126{
128 DPRINTF(Sparc, "Instruction: %#X\n", staticInst->machInst);
129 if (flags[PRINT_REG_DELTA])
130 {
131#if THE_ISA == SPARC_ISA
132 //Don't print what happens for each micro-op, just print out
133 //once at the last op, and for regular instructions.
134 if(!staticInst->isMicroOp() || staticInst->isLastMicroOp())
135 {
136 static uint64_t regs[32] = {

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142 static uint64_t y = 0;
143 static uint64_t floats[32];
144 uint64_t newVal;
145 static const char * prefixes[4] = {"G", "O", "L", "I"};
146
147 outs << hex;
148 outs << "PC = " << thread->readNextPC();
149 outs << " NPC = " << thread->readNextNPC();
127 if (flags[PRINT_REG_DELTA])
128 {
129#if THE_ISA == SPARC_ISA
130 //Don't print what happens for each micro-op, just print out
131 //once at the last op, and for regular instructions.
132 if(!staticInst->isMicroOp() || staticInst->isLastMicroOp())
133 {
134 static uint64_t regs[32] = {

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140 static uint64_t y = 0;
141 static uint64_t floats[32];
142 uint64_t newVal;
143 static const char * prefixes[4] = {"G", "O", "L", "I"};
144
145 outs << hex;
146 outs << "PC = " << thread->readNextPC();
147 outs << " NPC = " << thread->readNextNPC();
150 newVal = thread->readMiscReg(SparcISA::MISCREG_CCR);
148 newVal = thread->readIntReg(SparcISA::NumIntArchRegs + 2);
149 //newVal = thread->readMiscReg(SparcISA::MISCREG_CCR);
151 if(newVal != ccr)
152 {
153 outs << " CCR = " << newVal;
154 ccr = newVal;
155 }
150 if(newVal != ccr)
151 {
152 outs << " CCR = " << newVal;
153 ccr = newVal;
154 }
156 newVal = thread->readMiscReg(SparcISA::MISCREG_Y);
155 newVal = thread->readIntReg(SparcISA::NumIntArchRegs + 1);
156 //newVal = thread->readMiscReg(SparcISA::MISCREG_Y);
157 if(newVal != y)
158 {
159 outs << " Y = " << newVal;
160 y = newVal;
161 }
162 for(int y = 0; y < 4; y++)
163 {
164 for(int x = 0; x < 8; x++)

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288#if THE_ISA == SPARC_ISA && FULL_SYSTEM
289 // Compare
290 if (flags[LEGION_LOCKSTEP])
291 {
292 bool compared = false;
293 bool diffPC = false;
294 bool diffCC = false;
295 bool diffInst = false;
157 if(newVal != y)
158 {
159 outs << " Y = " << newVal;
160 y = newVal;
161 }
162 for(int y = 0; y < 4; y++)
163 {
164 for(int x = 0; x < 8; x++)

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288#if THE_ISA == SPARC_ISA && FULL_SYSTEM
289 // Compare
290 if (flags[LEGION_LOCKSTEP])
291 {
292 bool compared = false;
293 bool diffPC = false;
294 bool diffCC = false;
295 bool diffInst = false;
296 bool diffIntRegs = false;
297 bool diffFpRegs = false;
296 bool diffRegs = false;
298 bool diffTpc = false;
299 bool diffTnpc = false;
300 bool diffTstate = false;
301 bool diffTt = false;
302 bool diffTba = false;
303 bool diffHpstate = false;
304 bool diffHtstate = false;
305 bool diffHtba = false;

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310 bool diffGl = false;
311 bool diffAsi = false;
312 bool diffPil = false;
313 bool diffCwp = false;
314 bool diffCansave = false;
315 bool diffCanrestore = false;
316 bool diffOtherwin = false;
317 bool diffCleanwin = false;
297 bool diffTpc = false;
298 bool diffTnpc = false;
299 bool diffTstate = false;
300 bool diffTt = false;
301 bool diffTba = false;
302 bool diffHpstate = false;
303 bool diffHtstate = false;
304 bool diffHtba = false;

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309 bool diffGl = false;
310 bool diffAsi = false;
311 bool diffPil = false;
312 bool diffCwp = false;
313 bool diffCansave = false;
314 bool diffCanrestore = false;
315 bool diffOtherwin = false;
316 bool diffCleanwin = false;
318 bool diffTlb = false;
319 Addr m5Pc, lgnPc;
320
317 Addr m5Pc, lgnPc;
318
321 // We took a trap on a micro-op...
322 if (wasMicro && !staticInst->isMicroOp())
323 {
324 // let's skip comparing this cycle
325 while (!compared)
326 if (shared_data->flags == OWN_M5) {
327 shared_data->flags = OWN_LEGION;
328 compared = true;
329 }
330 compared = false;
331 wasMicro = false;
332 }
333
319
334 if (staticInst->isLastMicroOp())
335 wasMicro = false;
336 else if (staticInst->isMicroOp())
337 wasMicro = true;
338
339
340 if(!staticInst->isMicroOp() || staticInst->isLastMicroOp()) {
341 while (!compared) {
342 if (shared_data->flags == OWN_M5) {
343 m5Pc = PC & TheISA::PAddrImplMask;
320 if(!staticInst->isMicroOp() || staticInst->isLastMicroOp()) {
321 while (!compared) {
322 if (shared_data->flags == OWN_M5) {
323 m5Pc = PC & TheISA::PAddrImplMask;
344 if (bits(shared_data->pstate,3,3)) {
345 m5Pc &= mask(32);
346 }
347 lgnPc = shared_data->pc & TheISA::PAddrImplMask;
348 if (lgnPc != m5Pc)
349 diffPC = true;
350
351 if (shared_data->cycle_count !=
352 thread->getCpuPtr()->instCount())
353 diffCC = true;
354
355 if (shared_data->instruction !=
356 (SparcISA::MachInst)staticInst->machInst) {
357 diffInst = true;
358 }
359 for (int i = 0; i < TheISA::NumIntArchRegs; i++) {
360 if (thread->readIntReg(i) != shared_data->intregs[i]) {
324 lgnPc = shared_data->pc & TheISA::PAddrImplMask;
325 if (lgnPc != m5Pc)
326 diffPC = true;
327
328 if (shared_data->cycle_count !=
329 thread->getCpuPtr()->instCount())
330 diffCC = true;
331
332 if (shared_data->instruction !=
333 (SparcISA::MachInst)staticInst->machInst) {
334 diffInst = true;
335 }
336 for (int i = 0; i < TheISA::NumIntArchRegs; i++) {
337 if (thread->readIntReg(i) != shared_data->intregs[i]) {
361 diffIntRegs = true;
338 diffRegs = true;
362 }
363 }
339 }
340 }
364 for (int i = 0; i < TheISA::NumFloatRegs/2; i++) {
365 if (thread->readFloatRegBits(i*2,FloatRegFile::DoubleWidth) != shared_data->fpregs[i]) {
366 diffFpRegs = true;
367 }
368 }
369 uint64_t oldTl = thread->readMiscReg(MISCREG_TL);
341 uint64_t oldTl = thread->readMiscReg(MISCREG_TL);
370 if (oldTl != shared_data->tl)
371 diffTl = true;
372 for (int i = 1; i <= MaxTL; i++) {
373 thread->setMiscReg(MISCREG_TL, i);
374 if (thread->readMiscReg(MISCREG_TPC) !=
375 shared_data->tpc[i-1])
376 diffTpc = true;
377 if (thread->readMiscReg(MISCREG_TNPC) !=

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398 //we just don't compare it. It's not supposed to matter
399 //anyway.
400 if((shared_data->hpstate | (1 << 11)) != thread->readMiscReg(MISCREG_HPSTATE))
401 diffHpstate = true;
402 if(shared_data->htba != thread->readMiscReg(MISCREG_HTBA))
403 diffHtba = true;
404 if(shared_data->pstate != thread->readMiscReg(MISCREG_PSTATE))
405 diffPstate = true;
342 if (oldTl != shared_data->tl)
343 diffTl = true;
344 for (int i = 1; i <= MaxTL; i++) {
345 thread->setMiscReg(MISCREG_TL, i);
346 if (thread->readMiscReg(MISCREG_TPC) !=
347 shared_data->tpc[i-1])
348 diffTpc = true;
349 if (thread->readMiscReg(MISCREG_TNPC) !=

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370 //we just don't compare it. It's not supposed to matter
371 //anyway.
372 if((shared_data->hpstate | (1 << 11)) != thread->readMiscReg(MISCREG_HPSTATE))
373 diffHpstate = true;
374 if(shared_data->htba != thread->readMiscReg(MISCREG_HTBA))
375 diffHtba = true;
376 if(shared_data->pstate != thread->readMiscReg(MISCREG_PSTATE))
377 diffPstate = true;
406 if(shared_data->y != thread->readMiscReg(MISCREG_Y))
378 //if(shared_data->y != thread->readMiscReg(MISCREG_Y))
379 if(shared_data->y !=
380 thread->readIntReg(NumIntArchRegs + 1))
407 diffY = true;
381 diffY = true;
408 if(shared_data->ccr != thread->readMiscReg(MISCREG_CCR))
382 //if(shared_data->ccr != thread->readMiscReg(MISCREG_CCR))
383 if(shared_data->ccr !=
384 thread->readIntReg(NumIntArchRegs + 2))
409 diffCcr = true;
410 if(shared_data->gl != thread->readMiscReg(MISCREG_GL))
411 diffGl = true;
412 if(shared_data->asi != thread->readMiscReg(MISCREG_ASI))
413 diffAsi = true;
414 if(shared_data->pil != thread->readMiscReg(MISCREG_PIL))
415 diffPil = true;
416 if(shared_data->cwp != thread->readMiscReg(MISCREG_CWP))
417 diffCwp = true;
385 diffCcr = true;
386 if(shared_data->gl != thread->readMiscReg(MISCREG_GL))
387 diffGl = true;
388 if(shared_data->asi != thread->readMiscReg(MISCREG_ASI))
389 diffAsi = true;
390 if(shared_data->pil != thread->readMiscReg(MISCREG_PIL))
391 diffPil = true;
392 if(shared_data->cwp != thread->readMiscReg(MISCREG_CWP))
393 diffCwp = true;
418 if(shared_data->cansave != thread->readMiscReg(MISCREG_CANSAVE))
394 //if(shared_data->cansave != thread->readMiscReg(MISCREG_CANSAVE))
395 if(shared_data->cansave !=
396 thread->readIntReg(NumIntArchRegs + 3))
419 diffCansave = true;
397 diffCansave = true;
398 //if(shared_data->canrestore !=
399 // thread->readMiscReg(MISCREG_CANRESTORE))
420 if(shared_data->canrestore !=
400 if(shared_data->canrestore !=
421 thread->readMiscReg(MISCREG_CANRESTORE))
401 thread->readMiscReg(NumIntArchRegs + 4))
422 diffCanrestore = true;
402 diffCanrestore = true;
423 if(shared_data->otherwin != thread->readMiscReg(MISCREG_OTHERWIN))
403 //if(shared_data->otherwin != thread->readMiscReg(MISCREG_OTHERWIN))
404 if(shared_data->otherwin !=
405 thread->readIntReg(NumIntArchRegs + 5))
424 diffOtherwin = true;
406 diffOtherwin = true;
425 if(shared_data->cleanwin != thread->readMiscReg(MISCREG_CLEANWIN))
407 //if(shared_data->cleanwin != thread->readMiscReg(MISCREG_CLEANWIN))
408 if(shared_data->cleanwin !=
409 thread->readMiscReg(NumIntArchRegs + 6))
426 diffCleanwin = true;
427
410 diffCleanwin = true;
411
428 for (int i = 0; i < 64; i++) {
429 if (shared_data->itb[i] != thread->getITBPtr()->TteRead(i))
430 diffTlb = true;
431 if (shared_data->dtb[i] != thread->getDTBPtr()->TteRead(i))
432 diffTlb = true;
433 }
434
435 if ((diffPC || diffCC || diffInst || diffIntRegs ||
436 diffFpRegs || diffTpc || diffTnpc || diffTstate ||
437 diffTt || diffHpstate || diffHtstate || diffHtba ||
438 diffPstate || diffY || diffCcr || diffTl || diffGl ||
439 diffAsi || diffPil || diffCwp || diffCansave ||
440 diffCanrestore || diffOtherwin || diffCleanwin || diffTlb)
441 && !((staticInst->machInst & 0xC1F80000) == 0x81D00000)
442 && !(((staticInst->machInst & 0xC0000000) == 0xC0000000)
443 && shared_data->tl == thread->readMiscReg(MISCREG_TL) + 1)
444 ) {
445
412 if ((diffPC || diffCC || diffInst || diffRegs || diffTpc ||
413 diffTnpc || diffTstate || diffTt || diffHpstate ||
414 diffHtstate || diffHtba || diffPstate || diffY ||
415 diffCcr || diffTl || diffGl || diffAsi || diffPil ||
416 diffCwp || diffCansave || diffCanrestore ||
417 diffOtherwin || diffCleanwin)
418 && !((staticInst->machInst & 0xC1F80000) == 0x81D00000)) {
446 outs << "Differences found between M5 and Legion:";
447 if (diffPC)
448 outs << " [PC]";
449 if (diffCC)
450 outs << " [CC]";
451 if (diffInst)
452 outs << " [Instruction]";
419 outs << "Differences found between M5 and Legion:";
420 if (diffPC)
421 outs << " [PC]";
422 if (diffCC)
423 outs << " [CC]";
424 if (diffInst)
425 outs << " [Instruction]";
453 if (diffIntRegs)
426 if (diffRegs)
454 outs << " [IntRegs]";
427 outs << " [IntRegs]";
455 if (diffFpRegs)
456 outs << " [FpRegs]";
457 if (diffTpc)
458 outs << " [Tpc]";
459 if (diffTnpc)
460 outs << " [Tnpc]";
461 if (diffTstate)
462 outs << " [Tstate]";
463 if (diffTt)
464 outs << " [Tt]";

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487 if (diffCansave)
488 outs << " [Cansave]";
489 if (diffCanrestore)
490 outs << " [Canrestore]";
491 if (diffOtherwin)
492 outs << " [Otherwin]";
493 if (diffCleanwin)
494 outs << " [Cleanwin]";
428 if (diffTpc)
429 outs << " [Tpc]";
430 if (diffTnpc)
431 outs << " [Tnpc]";
432 if (diffTstate)
433 outs << " [Tstate]";
434 if (diffTt)
435 outs << " [Tt]";

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458 if (diffCansave)
459 outs << " [Cansave]";
460 if (diffCanrestore)
461 outs << " [Canrestore]";
462 if (diffOtherwin)
463 outs << " [Otherwin]";
464 if (diffCleanwin)
465 outs << " [Cleanwin]";
495 if (diffTlb)
496 outs << " [Tlb]";
497 outs << endl << endl;
498
499 outs << right << setfill(' ') << setw(15)
500 << "M5 PC: " << "0x"<< setw(16) << setfill('0')
501 << hex << m5Pc << endl;
502 outs << setfill(' ') << setw(15)
503 << "Legion PC: " << "0x"<< setw(16) << setfill('0') << hex
504 << lgnPc << endl << endl;

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533 shared_data->hpstate | (1 << 11));
534 printRegPair(outs, "Htba",
535 thread->readMiscReg(MISCREG_HTBA),
536 shared_data->htba);
537 printRegPair(outs, "Pstate",
538 thread->readMiscReg(MISCREG_PSTATE),
539 shared_data->pstate);
540 printRegPair(outs, "Y",
466 outs << endl << endl;
467
468 outs << right << setfill(' ') << setw(15)
469 << "M5 PC: " << "0x"<< setw(16) << setfill('0')
470 << hex << m5Pc << endl;
471 outs << setfill(' ') << setw(15)
472 << "Legion PC: " << "0x"<< setw(16) << setfill('0') << hex
473 << lgnPc << endl << endl;

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502 shared_data->hpstate | (1 << 11));
503 printRegPair(outs, "Htba",
504 thread->readMiscReg(MISCREG_HTBA),
505 shared_data->htba);
506 printRegPair(outs, "Pstate",
507 thread->readMiscReg(MISCREG_PSTATE),
508 shared_data->pstate);
509 printRegPair(outs, "Y",
541 thread->readMiscReg(MISCREG_Y),
510 //thread->readMiscReg(MISCREG_Y),
511 thread->readMiscReg(NumIntArchRegs + 1),
542 shared_data->y);
543 printRegPair(outs, "Ccr",
512 shared_data->y);
513 printRegPair(outs, "Ccr",
544 thread->readMiscReg(MISCREG_CCR),
514 //thread->readMiscReg(MISCREG_CCR),
515 thread->readMiscReg(NumIntArchRegs + 2),
545 shared_data->ccr);
546 printRegPair(outs, "Tl",
547 thread->readMiscReg(MISCREG_TL),
548 shared_data->tl);
549 printRegPair(outs, "Gl",
550 thread->readMiscReg(MISCREG_GL),
551 shared_data->gl);
552 printRegPair(outs, "Asi",
553 thread->readMiscReg(MISCREG_ASI),
554 shared_data->asi);
555 printRegPair(outs, "Pil",
556 thread->readMiscReg(MISCREG_PIL),
557 shared_data->pil);
558 printRegPair(outs, "Cwp",
559 thread->readMiscReg(MISCREG_CWP),
560 shared_data->cwp);
561 printRegPair(outs, "Cansave",
516 shared_data->ccr);
517 printRegPair(outs, "Tl",
518 thread->readMiscReg(MISCREG_TL),
519 shared_data->tl);
520 printRegPair(outs, "Gl",
521 thread->readMiscReg(MISCREG_GL),
522 shared_data->gl);
523 printRegPair(outs, "Asi",
524 thread->readMiscReg(MISCREG_ASI),
525 shared_data->asi);
526 printRegPair(outs, "Pil",
527 thread->readMiscReg(MISCREG_PIL),
528 shared_data->pil);
529 printRegPair(outs, "Cwp",
530 thread->readMiscReg(MISCREG_CWP),
531 shared_data->cwp);
532 printRegPair(outs, "Cansave",
562 thread->readMiscReg(MISCREG_CANSAVE),
533 //thread->readMiscReg(MISCREG_CANSAVE),
534 thread->readIntReg(NumIntArchRegs + 3),
563 shared_data->cansave);
564 printRegPair(outs, "Canrestore",
535 shared_data->cansave);
536 printRegPair(outs, "Canrestore",
565 thread->readMiscReg(MISCREG_CANRESTORE),
537 //thread->readMiscReg(MISCREG_CANRESTORE),
538 thread->readIntReg(NumIntArchRegs + 4),
566 shared_data->canrestore);
567 printRegPair(outs, "Otherwin",
539 shared_data->canrestore);
540 printRegPair(outs, "Otherwin",
568 thread->readMiscReg(MISCREG_OTHERWIN),
541 //thread->readMiscReg(MISCREG_OTHERWIN),
542 thread->readIntReg(NumIntArchRegs + 5),
569 shared_data->otherwin);
570 printRegPair(outs, "Cleanwin",
543 shared_data->otherwin);
544 printRegPair(outs, "Cleanwin",
571 thread->readMiscReg(MISCREG_CLEANWIN),
545 //thread->readMiscReg(MISCREG_CLEANWIN),
546 thread->readIntReg(NumIntArchRegs + 6),
572 shared_data->cleanwin);
573 outs << endl;
574 for (int i = 1; i <= MaxTL; i++) {
575 printLevelHeader(outs, i);
576 printColumnLabels(outs);
577 thread->setMiscReg(MISCREG_TL, i);
578 printRegPair(outs, "Tpc",
579 thread->readMiscReg(MISCREG_TPC),

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591 thread->readMiscReg(MISCREG_HTSTATE),
592 shared_data->htstate[i-1]);
593 }
594 thread->setMiscReg(MISCREG_TL, oldTl);
595 outs << endl;
596
597 printSectionHeader(outs, "General Purpose Registers");
598 static const char * regtypes[4] = {"%g", "%o", "%l", "%i"};
547 shared_data->cleanwin);
548 outs << endl;
549 for (int i = 1; i <= MaxTL; i++) {
550 printLevelHeader(outs, i);
551 printColumnLabels(outs);
552 thread->setMiscReg(MISCREG_TL, i);
553 printRegPair(outs, "Tpc",
554 thread->readMiscReg(MISCREG_TPC),

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566 thread->readMiscReg(MISCREG_HTSTATE),
567 shared_data->htstate[i-1]);
568 }
569 thread->setMiscReg(MISCREG_TL, oldTl);
570 outs << endl;
571
572 printSectionHeader(outs, "General Purpose Registers");
573 static const char * regtypes[4] = {"%g", "%o", "%l", "%i"};
599 for(int y = 0; y < 4; y++) {
600 for(int x = 0; x < 8; x++) {
574 for(int y = 0; y < 4; y++)
575 {
576 for(int x = 0; x < 8; x++)
577 {
601 char label[8];
602 sprintf(label, "%s%d", regtypes[y], x);
603 printRegPair(outs, label,
604 thread->readIntReg(y*8+x),
605 shared_data->intregs[y*8+x]);
578 char label[8];
579 sprintf(label, "%s%d", regtypes[y], x);
580 printRegPair(outs, label,
581 thread->readIntReg(y*8+x),
582 shared_data->intregs[y*8+x]);
583 /*outs << regtypes[y] << x << " " ;
584 outs << "0x" << hex << setw(16)
585 << thread->readIntReg(y*8+x);
586 if (thread->readIntReg(y*8 + x)
587 != shared_data->intregs[y*8+x])
588 outs << " X ";
589 else
590 outs << " | ";
591 outs << "0x" << setw(16) << hex
592 << shared_data->intregs[y*8+x]
593 << endl;*/
606 }
607 }
594 }
595 }
608 if (diffFpRegs) {
609 for (int x = 0; x < 32; x++) {
610 char label[8];
611 sprintf(label, "%%f%d", x);
612 printRegPair(outs, label,
613 thread->readFloatRegBits(x,FloatRegFile::DoubleWidth),
614 shared_data->fpregs[x]);
615 }
616 }
617 if (diffTlb) {
618 printColumnLabels(outs);
619 char label[8];
620 for (int x = 0; x < 64; x++) {
621 if (shared_data->itb[x] != ULL(0xFFFFFFFFFFFFFFFF) ||
622 thread->getITBPtr()->TteRead(x) != ULL(0xFFFFFFFFFFFFFFFF)) {
623 sprintf(label, "I-TLB:%02d", x);
624 printRegPair(outs, label, thread->getITBPtr()->TteRead(x),
625 shared_data->itb[x]);
626 }
627 }
628 for (int x = 0; x < 64; x++) {
629 if (shared_data->dtb[x] != ULL(0xFFFFFFFFFFFFFFFF) ||
630 thread->getDTBPtr()->TteRead(x) != ULL(0xFFFFFFFFFFFFFFFF)) {
631 sprintf(label, "D-TLB:%02d", x);
632 printRegPair(outs, label, thread->getDTBPtr()->TteRead(x),
633 shared_data->dtb[x]);
634 }
635 }
636 thread->getITBPtr()->dumpAll();
637 thread->getDTBPtr()->dumpAll();
638 }
596 thread->getITBPtr()->dumpAll();
597 thread->getDTBPtr()->dumpAll();
639
640 diffcount++;
641 if (diffcount > 2)
642 fatal("Differences found between Legion and M5\n");
598
599 diffcount++;
600 if (diffcount > 2)
601 fatal("Differences found between Legion and M5\n");
643 } else
644 diffcount = 0;
602 }
645
646 compared = true;
647 shared_data->flags = OWN_LEGION;
648 }
649 } // while
650 } // if not microop
651 }
652#endif

--- 109 unchanged lines hidden --- 		603
604 compared = true;
605 shared_data->flags = OWN_LEGION;
606 }
607 } // while
608 } // if not microop
609 }
610#endif

--- 109 unchanged lines hidden ---