exetrace.cc (3588:e4ce301f8c7d) | exetrace.cc (3603:714467743f9b) |
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1/* 2 * Copyright (c) 2001-2005 The Regents of The University of Michigan 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions are 7 * met: redistributions of source code must retain the above copyright 8 * notice, this list of conditions and the following disclaimer; --- 24 unchanged lines hidden (view full) --- 33 34#include <fstream> 35#include <iomanip> 36#include <sys/ipc.h> 37#include <sys/shm.h> 38 39#include "arch/regfile.hh" 40#include "arch/utility.hh" | 1/* 2 * Copyright (c) 2001-2005 The Regents of The University of Michigan 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions are 7 * met: redistributions of source code must retain the above copyright 8 * notice, this list of conditions and the following disclaimer; --- 24 unchanged lines hidden (view full) --- 33 34#include <fstream> 35#include <iomanip> 36#include <sys/ipc.h> 37#include <sys/shm.h> 38 39#include "arch/regfile.hh" 40#include "arch/utility.hh" |
41#include "arch/tlb.hh" |
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41#include "base/loader/symtab.hh" 42#include "cpu/base.hh" 43#include "cpu/exetrace.hh" 44#include "cpu/static_inst.hh" 45#include "sim/param.hh" 46#include "sim/system.hh" 47 48//XXX This is temporary --- 178 unchanged lines hidden (view full) --- 227#if THE_ISA == SPARC_ISA 228 // Compare 229 if (flags[LEGION_LOCKSTEP]) 230 { 231 bool compared = false; 232 bool diffPC = false; 233 bool diffInst = false; 234 bool diffRegs = false; | 42#include "base/loader/symtab.hh" 43#include "cpu/base.hh" 44#include "cpu/exetrace.hh" 45#include "cpu/static_inst.hh" 46#include "sim/param.hh" 47#include "sim/system.hh" 48 49//XXX This is temporary --- 178 unchanged lines hidden (view full) --- 228#if THE_ISA == SPARC_ISA 229 // Compare 230 if (flags[LEGION_LOCKSTEP]) 231 { 232 bool compared = false; 233 bool diffPC = false; 234 bool diffInst = false; 235 bool diffRegs = false; |
236 Addr m5Pc, lgnPc; |
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235 | 237 |
238 |
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236 if(!staticInst->isMicroOp() || staticInst->isLastMicroOp()) { 237 while (!compared) { | 239 if(!staticInst->isMicroOp() || staticInst->isLastMicroOp()) { 240 while (!compared) { |
241 m5Pc = PC & TheISA::PAddrImplMask; 242 lgnPc = shared_data->pc & TheISA::PAddrImplMask; |
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238 if (shared_data->flags == OWN_M5) { | 243 if (shared_data->flags == OWN_M5) { |
239 if (shared_data->pc != PC) | 244 if (lgnPc != m5Pc) |
240 diffPC = true; 241 if (shared_data->instruction != staticInst->machInst) 242 diffInst = true; | 245 diffPC = true; 246 if (shared_data->instruction != staticInst->machInst) 247 diffInst = true; |
243 for (int i = 0; i < TheISA::NumIntRegs; i++) { 244 if (thread->readIntReg(i) != shared_data->intregs[i]) | 248 for (int i = 0; i < TheISA::NumRegularIntRegs; i++) { 249 if (thread->readIntReg(i) != shared_data->intregs[i]) { |
245 diffRegs = true; | 250 diffRegs = true; |
251 } |
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246 } 247 248 if (diffPC || diffInst || diffRegs ) { 249 outs << "Differences found between M5 and Legion:"; 250 if (diffPC) 251 outs << " [PC]"; 252 if (diffInst) 253 outs << " [Instruction]"; 254 if (diffRegs) 255 outs << " [IntRegs]"; | 252 } 253 254 if (diffPC || diffInst || diffRegs ) { 255 outs << "Differences found between M5 and Legion:"; 256 if (diffPC) 257 outs << " [PC]"; 258 if (diffInst) 259 outs << " [Instruction]"; 260 if (diffRegs) 261 outs << " [IntRegs]"; |
256 outs << endl << endl;; | 262 outs << endl << endl; |
257 | 263 |
258 outs << setfill(' ') << setw(15) | 264 outs << right << setfill(' ') << setw(15) |
259 << "M5 PC: " << "0x"<< setw(16) << setfill('0') | 265 << "M5 PC: " << "0x"<< setw(16) << setfill('0') |
260 << hex << PC << endl; | 266 << hex << m5Pc << endl; |
261 outs << setfill(' ') << setw(15) 262 << "Legion PC: " << "0x"<< setw(16) << setfill('0') << hex | 267 outs << setfill(' ') << setw(15) 268 << "Legion PC: " << "0x"<< setw(16) << setfill('0') << hex |
263 << shared_data->pc << endl << endl; | 269 << lgnPc << endl << endl; |
264 265 outs << setfill(' ') << setw(15) 266 << "M5 Inst: " << "0x"<< setw(8) 267 << setfill('0') << hex << staticInst->machInst | 270 271 outs << setfill(' ') << setw(15) 272 << "M5 Inst: " << "0x"<< setw(8) 273 << setfill('0') << hex << staticInst->machInst |
268 << staticInst->disassemble(PC, debugSymbolTable) | 274 << staticInst->disassemble(m5Pc, debugSymbolTable) |
269 << endl; 270 271 StaticInstPtr legionInst = StaticInst::decode(makeExtMI(shared_data->instruction, thread)); 272 outs << setfill(' ') << setw(15) 273 << " Legion Inst: " 274 << "0x" << setw(8) << setfill('0') << hex 275 << shared_data->instruction | 275 << endl; 276 277 StaticInstPtr legionInst = StaticInst::decode(makeExtMI(shared_data->instruction, thread)); 278 outs << setfill(' ') << setw(15) 279 << " Legion Inst: " 280 << "0x" << setw(8) << setfill('0') << hex 281 << shared_data->instruction |
276 << legionInst->disassemble(shared_data->pc, debugSymbolTable) | 282 << legionInst->disassemble(lgnPc, debugSymbolTable) |
277 << endl; 278 279 outs << endl; 280 281 static const char * regtypes[4] = {"%g", "%o", "%l", "%i"}; 282 for(int y = 0; y < 4; y++) 283 { 284 for(int x = 0; x < 8; x++) --- 96 unchanged lines hidden (view full) --- 381 flags[PC_SYMBOL] = exe_trace_pc_symbol; 382 flags[INTEL_FORMAT] = exe_trace_intel_format; 383 flags[LEGION_LOCKSTEP] = exe_trace_legion_lockstep; 384 trace_system = exe_trace_system; 385 386 // If were going to be in lockstep with Legion 387 // Setup shared memory, and get otherwise ready 388 if (flags[LEGION_LOCKSTEP]) { | 283 << endl; 284 285 outs << endl; 286 287 static const char * regtypes[4] = {"%g", "%o", "%l", "%i"}; 288 for(int y = 0; y < 4; y++) 289 { 290 for(int x = 0; x < 8; x++) --- 96 unchanged lines hidden (view full) --- 387 flags[PC_SYMBOL] = exe_trace_pc_symbol; 388 flags[INTEL_FORMAT] = exe_trace_intel_format; 389 flags[LEGION_LOCKSTEP] = exe_trace_legion_lockstep; 390 trace_system = exe_trace_system; 391 392 // If were going to be in lockstep with Legion 393 // Setup shared memory, and get otherwise ready 394 if (flags[LEGION_LOCKSTEP]) { |
389 int shmfd = shmget(getuid(), sizeof(SharedData), 0777); | 395 int shmfd = shmget('M' << 24 | getuid(), sizeof(SharedData), 0777); |
390 if (shmfd < 0) 391 fatal("Couldn't get shared memory fd. Is Legion running?"); 392 393 shared_data = (SharedData*)shmat(shmfd, NULL, SHM_RND); 394 if (shared_data == (SharedData*)-1) 395 fatal("Couldn't allocate shared memory"); 396 397 if (shared_data->flags != OWN_M5) 398 fatal("Shared memory has invalid owner"); 399 400 if (shared_data->version != VERSION) 401 fatal("Shared Data is wrong version! M5: %d Legion: %d", VERSION, 402 shared_data->version); 403 | 396 if (shmfd < 0) 397 fatal("Couldn't get shared memory fd. Is Legion running?"); 398 399 shared_data = (SharedData*)shmat(shmfd, NULL, SHM_RND); 400 if (shared_data == (SharedData*)-1) 401 fatal("Couldn't allocate shared memory"); 402 403 if (shared_data->flags != OWN_M5) 404 fatal("Shared memory has invalid owner"); 405 406 if (shared_data->version != VERSION) 407 fatal("Shared Data is wrong version! M5: %d Legion: %d", VERSION, 408 shared_data->version); 409 |
410 // step legion forward one cycle so we can get register values 411 shared_data->flags = OWN_LEGION; |
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404 } 405} 406 407void 408ExecutionTraceParamContext::checkParams() 409{ 410 Trace::InstRecord::setParams(); 411} 412 | 412 } 413} 414 415void 416ExecutionTraceParamContext::checkParams() 417{ 418 Trace::InstRecord::setParams(); 419} 420 |