1/* 2 * Copyright (c) 2001-2005 The Regents of The University of Michigan 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions are 7 * met: redistributions of source code must retain the above copyright 8 * notice, this list of conditions and the following disclaimer; --- 27 unchanged lines hidden (view full) --- 36#include "arch/isa_traits.hh" 37#include "arch/utility.hh" 38#include "base/loader/symtab.hh" 39#include "config/the_isa.hh" 40#include "cpu/base.hh" 41#include "cpu/exetrace.hh" 42#include "cpu/static_inst.hh" 43#include "cpu/thread_context.hh" |
44#include "debug/ExecAll.hh" |
45#include "enums/OpClass.hh" 46 47using namespace std; 48using namespace TheISA; 49 50namespace Trace { 51 52void 53ExeTracerRecord::dumpTicks(ostream &outs) 54{ 55 ccprintf(outs, "%7d: ", when); 56} 57 58void 59Trace::ExeTracerRecord::traceInst(StaticInstPtr inst, bool ran) 60{ 61 ostream &outs = Trace::output(); 62 |
63 if (Debug::ExecTicks) |
64 dumpTicks(outs); 65 66 outs << thread->getCpuPtr()->name() << " "; 67 |
68 if (Debug::ExecSpeculative) |
69 outs << (misspeculating ? "-" : "+") << " "; 70 |
71 if (Debug::ExecThread) |
72 outs << "T" << thread->threadId() << " : "; 73 74 std::string sym_str; 75 Addr sym_addr; 76 Addr cur_pc = pc.instAddr(); |
77 if (debugSymbolTable && Debug::ExecSymbol |
78#if FULL_SYSTEM 79 && !inUserMode(thread) 80#endif 81 && debugSymbolTable->findNearestSymbol(cur_pc, sym_str, sym_addr)) { 82 if (cur_pc != sym_addr) 83 sym_str += csprintf("+%d",cur_pc - sym_addr); 84 outs << "@" << sym_str; 85 } else { --- 13 unchanged lines hidden (view full) --- 99 // 100 101 outs << setw(26) << left; 102 outs << inst->disassemble(cur_pc, debugSymbolTable); 103 104 if (ran) { 105 outs << " : "; 106 |
107 if (Debug::ExecOpClass) { |
108 outs << Enums::OpClassStrings[inst->opClass()] << " : "; 109 } 110 |
111 if (Debug::ExecResult && predicate == false) { |
112 outs << "Predicated False"; 113 } 114 |
115 if (Debug::ExecResult && data_status != DataInvalid) { |
116 ccprintf(outs, " D=%#018x", data.as_int); 117 } 118 |
119 if (Debug::ExecEffAddr && addr_valid) |
120 outs << " A=0x" << hex << addr; 121 |
122 if (Debug::ExecFetchSeq && fetch_seq_valid) |
123 outs << " FetchSeq=" << dec << fetch_seq; 124 |
125 if (Debug::ExecCPSeq && cp_seq_valid) |
126 outs << " CPSeq=" << dec << cp_seq; 127 } 128 129 // 130 // End of line... 131 // 132 outs << endl; 133} --- 4 unchanged lines hidden (view full) --- 138 /* 139 * The behavior this check tries to achieve is that if ExecMacro is on, 140 * the macroop will be printed. If it's on and microops are also on, it's 141 * printed before the microops start printing to give context. If the 142 * microops aren't printed, then it's printed only when the final microop 143 * finishes. Macroops then behave like regular instructions and don't 144 * complete/print when they fault. 145 */ |
146 if (Debug::ExecMacro && staticInst->isMicroop() && 147 ((Debug::ExecMicro && 148 macroStaticInst && staticInst->isFirstMicroop()) || 149 (!Debug::ExecMicro && |
150 macroStaticInst && staticInst->isLastMicroop()))) { 151 traceInst(macroStaticInst, false); 152 } |
153 if (Debug::ExecMicro || !staticInst->isMicroop()) { |
154 traceInst(staticInst, true); 155 } 156} 157 158} // namespace Trace 159 160//////////////////////////////////////////////////////////////////////// 161// 162// ExeTracer Simulation Object 163// 164Trace::ExeTracer * 165ExeTracerParams::create() 166{ 167 return new Trace::ExeTracer(this); 168}; |