exec_context.hh (3735:86a7cf4dcc11) exec_context.hh (4172:141705d83494)
1/*
2 * Copyright (c) 2002-2005 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;

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95 /** Sets the PC. */
96 void setPC(uint64_t val);
97 /** Sets the NextPC. */
98 void setNextPC(uint64_t val);
99 /** Sets the Next-NextPC. Only for architectures like SPARC or MIPS. */
100 void setNextNPC(uint64_t val);
101
102 /** Reads a miscellaneous register. */
1/*
2 * Copyright (c) 2002-2005 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;

--- 86 unchanged lines hidden (view full) ---

95 /** Sets the PC. */
96 void setPC(uint64_t val);
97 /** Sets the NextPC. */
98 void setNextPC(uint64_t val);
99 /** Sets the Next-NextPC. Only for architectures like SPARC or MIPS. */
100 void setNextNPC(uint64_t val);
101
102 /** Reads a miscellaneous register. */
103 MiscReg readMiscReg(int misc_reg);
103 MiscReg readMiscRegNoEffect(int misc_reg);
104
105 /** Reads a miscellaneous register, handling any architectural
106 * side effects due to reading that register. */
104
105 /** Reads a miscellaneous register, handling any architectural
106 * side effects due to reading that register. */
107 MiscReg readMiscRegWithEffect(int misc_reg);
107 MiscReg readMiscReg(int misc_reg);
108
109 /** Sets a miscellaneous register. */
108
109 /** Sets a miscellaneous register. */
110 void setMiscReg(int misc_reg, const MiscReg &val);
110 void setMiscRegNoEffect(int misc_reg, const MiscReg &val);
111
112 /** Sets a miscellaneous register, handling any architectural
113 * side effects due to writing that register. */
111
112 /** Sets a miscellaneous register, handling any architectural
113 * side effects due to writing that register. */
114 void setMiscRegWithEffect(int misc_reg, const MiscReg &val);
114 void setMiscReg(int misc_reg, const MiscReg &val);
115
116 /** Records the effective address of the instruction. Only valid
117 * for memory ops. */
118 void setEA(Addr EA);
119 /** Returns the effective address of the instruction. Only valid
120 * for memory ops. */
121 Addr getEA();
122

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116 /** Records the effective address of the instruction. Only valid
117 * for memory ops. */
118 void setEA(Addr EA);
119 /** Returns the effective address of the instruction. Only valid
120 * for memory ops. */
121 Addr getEA();
122

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