exec_context.hh (12106:7784fac1b159) exec_context.hh (12109:f29e9c5418aa)
1/*
1/*
2 * Copyright (c) 2014 ARM Limited
2 * Copyright (c) 2014, 2016 ARM Limited
3 * All rights reserved
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software
9 * licensed hereunder. You may use the software subject to the license
10 * terms below provided that you ensure that this notice is replicated

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74 public:
75 typedef TheISA::IntReg IntReg;
76 typedef TheISA::PCState PCState;
77 typedef TheISA::FloatReg FloatReg;
78 typedef TheISA::FloatRegBits FloatRegBits;
79 typedef TheISA::MiscReg MiscReg;
80
81 typedef TheISA::CCReg CCReg;
3 * All rights reserved
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software
9 * licensed hereunder. You may use the software subject to the license
10 * terms below provided that you ensure that this notice is replicated

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74 public:
75 typedef TheISA::IntReg IntReg;
76 typedef TheISA::PCState PCState;
77 typedef TheISA::FloatReg FloatReg;
78 typedef TheISA::FloatRegBits FloatRegBits;
79 typedef TheISA::MiscReg MiscReg;
80
81 typedef TheISA::CCReg CCReg;
82 using VecRegContainer = TheISA::VecRegContainer;
83 using VecElem = TheISA::VecElem;
82
83 public:
84 /**
85 * @{
86 * @name Integer Register Interfaces
87 *
88 */
89

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116
117 /** Sets the bits of a floating point register of single width
118 * to a binary value. */
119 virtual void setFloatRegOperandBits(const StaticInst *si,
120 int idx, FloatRegBits val) = 0;
121
122 /** @} */
123
84
85 public:
86 /**
87 * @{
88 * @name Integer Register Interfaces
89 *
90 */
91

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118
119 /** Sets the bits of a floating point register of single width
120 * to a binary value. */
121 virtual void setFloatRegOperandBits(const StaticInst *si,
122 int idx, FloatRegBits val) = 0;
123
124 /** @} */
125
126 /** Vector Register Interfaces. */
127 /** @{ */
128 /** Reads source vector register operand. */
129 virtual const VecRegContainer&
130 readVecRegOperand(const StaticInst *si, int idx) const = 0;
131
132 /** Gets destination vector register operand for modification. */
133 virtual VecRegContainer&
134 getWritableVecRegOperand(const StaticInst *si, int idx) = 0;
135
136 /** Sets a destination vector register operand to a value. */
137 virtual void
138 setVecRegOperand(const StaticInst *si, int idx,
139 const VecRegContainer& val) = 0;
140 /** @} */
141
142 /** Vector Register Lane Interfaces. */
143 /** @{ */
144 /** Reads source vector 8bit operand. */
145 virtual ConstVecLane8
146 readVec8BitLaneOperand(const StaticInst *si, int idx) const = 0;
147
148 /** Reads source vector 16bit operand. */
149 virtual ConstVecLane16
150 readVec16BitLaneOperand(const StaticInst *si, int idx) const = 0;
151
152 /** Reads source vector 32bit operand. */
153 virtual ConstVecLane32
154 readVec32BitLaneOperand(const StaticInst *si, int idx) const = 0;
155
156 /** Reads source vector 64bit operand. */
157 virtual ConstVecLane64
158 readVec64BitLaneOperand(const StaticInst *si, int idx) const = 0;
159
160 /** Write a lane of the destination vector operand. */
161 /** @{ */
162 virtual void setVecLaneOperand(const StaticInst *si, int idx,
163 const LaneData<LaneSize::Byte>& val) = 0;
164 virtual void setVecLaneOperand(const StaticInst *si, int idx,
165 const LaneData<LaneSize::TwoByte>& val) = 0;
166 virtual void setVecLaneOperand(const StaticInst *si, int idx,
167 const LaneData<LaneSize::FourByte>& val) = 0;
168 virtual void setVecLaneOperand(const StaticInst *si, int idx,
169 const LaneData<LaneSize::EightByte>& val) = 0;
170 /** @} */
171
172 /** Vector Elem Interfaces. */
173 /** @{ */
174 /** Reads an element of a vector register. */
175 virtual VecElem readVecElemOperand(const StaticInst *si,
176 int idx) const = 0;
177
178 /** Sets a vector register to a value. */
179 virtual void setVecElemOperand(const StaticInst *si, int idx,
180 const VecElem val) = 0;
181 /** @} */
182
124 /**
125 * @{
126 * @name Condition Code Registers
127 */
128 virtual CCReg readCCRegOperand(const StaticInst *si, int idx) = 0;
129 virtual void setCCRegOperand(const StaticInst *si, int idx, CCReg val) = 0;
130 /** @} */
131

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184 * @{
185 * @name Condition Code Registers
186 */
187 virtual CCReg readCCRegOperand(const StaticInst *si, int idx) = 0;
188 virtual void setCCRegOperand(const StaticInst *si, int idx, CCReg val) = 0;
189 /** @} */
190

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