| exec_context.hh (12104:edd63f9c6184) | exec_context.hh (12106:7784fac1b159) |
|---|---|
| 1/* 2 * Copyright (c) 2014 ARM Limited 3 * All rights reserved 4 * 5 * The license below extends only to copyright in the software and shall 6 * not be construed as granting a license to any other intellectual 7 * property including but not limited to intellectual property relating 8 * to a hardware implementation of the functionality of the software --- 273 unchanged lines hidden (view full) --- 282 /** @} */ 283 284 /** 285 * @{ 286 * @name MIPS-Specific Interfaces 287 */ 288 289#if THE_ISA == MIPS_ISA | 1/* 2 * Copyright (c) 2014 ARM Limited 3 * All rights reserved 4 * 5 * The license below extends only to copyright in the software and shall 6 * not be construed as granting a license to any other intellectual 7 * property including but not limited to intellectual property relating 8 * to a hardware implementation of the functionality of the software --- 273 unchanged lines hidden (view full) --- 282 /** @} */ 283 284 /** 285 * @{ 286 * @name MIPS-Specific Interfaces 287 */ 288 289#if THE_ISA == MIPS_ISA |
| 290 virtual MiscReg readRegOtherThread(RegId reg, | 290 virtual MiscReg readRegOtherThread(const RegId& reg, |
| 291 ThreadID tid = InvalidThreadID) = 0; | 291 ThreadID tid = InvalidThreadID) = 0; |
| 292 virtual void setRegOtherThread(RegId reg, MiscReg val, | 292 virtual void setRegOtherThread(const RegId& reg, MiscReg val, |
| 293 ThreadID tid = InvalidThreadID) = 0; 294#endif 295 296 /** @} */ 297}; 298 299#endif // __CPU_EXEC_CONTEXT_HH__ | 293 ThreadID tid = InvalidThreadID) = 0; 294#endif 295 296 /** @} */ 297}; 298 299#endif // __CPU_EXEC_CONTEXT_HH__ |