exec_context.hh (10474:799c8ee4ecba) exec_context.hh (10529:05b5a6cf3521)
1/*
2 * Copyright (c) 2014 ARM Limited
3 * All rights reserved
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software

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42 */
43
44#ifndef __CPU_EXEC_CONTEXT_HH__
45#define __CPU_EXEC_CONTEXT_HH__
46
47#include "arch/registers.hh"
48#include "base/types.hh"
49#include "config/the_isa.hh"
1/*
2 * Copyright (c) 2014 ARM Limited
3 * All rights reserved
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software

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42 */
43
44#ifndef __CPU_EXEC_CONTEXT_HH__
45#define __CPU_EXEC_CONTEXT_HH__
46
47#include "arch/registers.hh"
48#include "base/types.hh"
49#include "config/the_isa.hh"
50#include "cpu/base.hh"
50#include "cpu/static_inst_fwd.hh"
51#include "cpu/translation.hh"
52
53/**
54 * The ExecContext is an abstract base class the provides the
55 * interface used by the ISA to manipulate the state of the CPU model.
56 *
57 * Register accessor methods in this class typically provide the index

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238 * @{
239 * @name X86-Specific Interfaces
240 */
241
242 /**
243 * Invalidate a page in the DTLB <i>and</i> ITLB.
244 */
245 virtual void demapPage(Addr vaddr, uint64_t asn) = 0;
51#include "cpu/static_inst_fwd.hh"
52#include "cpu/translation.hh"
53
54/**
55 * The ExecContext is an abstract base class the provides the
56 * interface used by the ISA to manipulate the state of the CPU model.
57 *
58 * Register accessor methods in this class typically provide the index

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239 * @{
240 * @name X86-Specific Interfaces
241 */
242
243 /**
244 * Invalidate a page in the DTLB <i>and</i> ITLB.
245 */
246 virtual void demapPage(Addr vaddr, uint64_t asn) = 0;
247 virtual void armMonitor(Addr address) = 0;
248 virtual bool mwait(PacketPtr pkt) = 0;
249 virtual void mwaitAtomic(ThreadContext *tc) = 0;
250 virtual AddressMonitor *getAddrMonitor() = 0;
246
247 /** @} */
248
249 /**
250 * @{
251 * @name MIPS-Specific Interfaces
252 */
253
254#if THE_ISA == MIPS_ISA
255 virtual MiscReg readRegOtherThread(int regIdx,
256 ThreadID tid = InvalidThreadID) = 0;
257 virtual void setRegOtherThread(int regIdx, MiscReg val,
258 ThreadID tid = InvalidThreadID) = 0;
259#endif
260
261 /** @} */
262};
263
264#endif // __CPU_EXEC_CONTEXT_HH__
251
252 /** @} */
253
254 /**
255 * @{
256 * @name MIPS-Specific Interfaces
257 */
258
259#if THE_ISA == MIPS_ISA
260 virtual MiscReg readRegOtherThread(int regIdx,
261 ThreadID tid = InvalidThreadID) = 0;
262 virtual void setRegOtherThread(int regIdx, MiscReg val,
263 ThreadID tid = InvalidThreadID) = 0;
264#endif
265
266 /** @} */
267};
268
269#endif // __CPU_EXEC_CONTEXT_HH__