75d74
< typedef TheISA::IntReg IntReg;
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< typedef TheISA::FloatReg FloatReg;
< typedef TheISA::FloatRegBits FloatRegBits;
< typedef TheISA::MiscReg MiscReg;
93c89
< virtual IntReg readIntRegOperand(const StaticInst *si, int idx) = 0;
---
> virtual RegVal readIntRegOperand(const StaticInst *si, int idx) = 0;
97c93
< int idx, IntReg val) = 0;
---
> int idx, RegVal val) = 0;
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< virtual FloatRegBits readFloatRegOperandBits(const StaticInst *si,
< int idx) = 0;
---
> virtual RegVal readFloatRegOperandBits(const StaticInst *si, int idx) = 0;
115c110
< int idx, FloatRegBits val) = 0;
---
> int idx, RegVal val) = 0;
188c183
< virtual MiscReg readMiscRegOperand(const StaticInst *si, int idx) = 0;
---
> virtual RegVal readMiscRegOperand(const StaticInst *si, int idx) = 0;
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< int idx, const MiscReg &val) = 0;
---
> int idx, const RegVal &val) = 0;
196c191
< virtual MiscReg readMiscReg(int misc_reg) = 0;
---
> virtual RegVal readMiscReg(int misc_reg) = 0;
202c197
< virtual void setMiscReg(int misc_reg, const MiscReg &val) = 0;
---
> virtual void setMiscReg(int misc_reg, const RegVal &val) = 0;
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< virtual MiscReg readRegOtherThread(const RegId& reg,
< ThreadID tid = InvalidThreadID) = 0;
< virtual void setRegOtherThread(const RegId& reg, MiscReg val,
< ThreadID tid = InvalidThreadID) = 0;
---
> virtual RegVal readRegOtherThread(const RegId &reg,
> ThreadID tid=InvalidThreadID) = 0;
> virtual void setRegOtherThread(const RegId& reg, RegVal val,
> ThreadID tid=InvalidThreadID) = 0;