1/*
2 * Copyright (c) 2014, 2016-2017 ARM Limited
3 * All rights reserved
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software

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256 /**
257 * For atomic-mode contexts, perform an atomic memory write operation.
258 * For timing-mode contexts, initiate a timing memory write operation.
259 */
260 virtual Fault writeMem(uint8_t *data, unsigned int size, Addr addr,
261 Request::Flags flags, uint64_t *res) = 0;
262
263 /**
264 * Sets the number of consecutive store conditional failures.
265 */
266 virtual void setStCondFailures(unsigned int sc_failures) = 0;
267
268 /**
269 * Returns the number of consecutive store conditional failures.
270 */
271 virtual unsigned int readStCondFailures() const = 0;

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